SLLSFV5 October   2026 ISO6061 , ISO6062 , ISO6063

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics—5V Supply
    10. 6.10 Supply Current Characteristics—5V Supply
    11. 6.11 Electrical Characteristics—3.3V Supply
    12. 6.12 Supply Current Characteristics—3.3V Supply
    13. 6.13 Electrical Characteristics—2.5V Supply 
    14. 6.14 Supply Current Characteristics—2.5V Supply
    15. 6.15 Electrical Characteristics—1.8V Supply 
    16. 6.16 Supply Current Characteristics—1.8V Supply
    17. 6.17 Switching Characteristics—5V Supply
    18. 6.18 Switching Characteristics—3.3V Supply
    19. 6.19 Switching Characteristics—2.5V Supply
    20. 6.20 Switching Characteristics—1.8V Supply
    21. 6.21 Insulation Characteristics Curves
    22. 6.22 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Electromagnetic Compatibility (EMC) Considerations
    4. 8.4 Device Functional Modes
    5. 8.5 Device I/O Schematics
    6. 8.6 Overvoltage Tolerant Input
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Device Nomenclature
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1.     60

6.6 Insulation Specifications

PARAMETER TEST CONDITIONS PACKAGE UNIT
16-DW
Intrinsic Insulation Capability
VAC_RMS
Intrinsic Working Voltage(1)		 AC voltage, bipolar 1061 VRMS
VAC_PK 1500 VPK
VDC DC voltage 2121 VDC
IEC 60664-1
CLR External clearance(2) Side 1 to side 2 distance through air >8.15 mm
CPG External creepage(2) Side 1 to side 2 distance across package surface >8.15 mm
DTI Distance through the insulation Minimum internal gap (internal clearance) >17 µm
CTI Comparative tracking index IEC 60112 > 600 V
Material Group According to IEC 60664-1 I
Overvoltage category Rated mains voltage ≤ 150VRMS I-IV
Rated mains voltage ≤ 300VRMS I-IV
Rated mains voltage ≤ 600VRMS I-IV
Rated mains voltage ≤ 1000VRMS I-III
DIN EN IEC 60747-17 (VDE 0884-17)(3)
Certification Rating(3) Reinforced
VIORM Maximum repetitive peak isolation voltage AC voltage (bipolar) 1500 VPK
VIOWM Maximum isolation working voltage AC voltage (sine wave); time-dependent dielectric breakdown (TDDB) test. 1061 VRMS
DC voltage 1500 VDC
VIOTM Maximum transient isolation voltage VTEST = VIOTM, t = 60s (qualification);
VTEST = 1.2 × VIOTM, t= 1s (100% production)		 7071 VPK
VIMP Maximum impulse voltage(4) Tested in air, 1.2/50µs waveform per IEC 62368-1 8000 VPK
VIOSM Maximum surge isolation voltage(5) VIOSM ≥ 1.3 × VIMP; Tested in oil (qualification test), 1.2/50μs waveform per IEC 62368-1 10400 VPK
qpd Apparent charge(6) Method a, After Input-output safety test subgroup 2/3, Vini = VIOTM, tini = 60s; Vpd(m) = 1.2 × VIORM, tm = 10s ≤5 pC
Method a, After environmental tests subgroup 1, Vini = VIOTM, tini = 60s; Vpd(m) = 1.6 × VIORM, tm = 10s ≤5
Method b: At routine test (100% production); Vini = 1.2 × VIOTM, tini = 1s;  Vpd(m) = 1.875 × VIORM, tm = 1s (method b1) or Vpd(m) = Vini, tm = tini (method b2) ≤5
CIO Barrier capacitance, input to output(7) VIO = 0.4 × sin (2 πft), f = 1MHz ≅2.4 pF
RIO Insulation resistance, input to output(7) VIO = 500V, TA = 25°C >1012 Ω
VIO = 500V,  100°C ≤ TA ≤ 125°C >1011
VIO = 500V at  TS = 150°C >109
Pollution degree 2
Climatic category 40/125/21
UL 1577
VISO Withstand isolation voltage VTEST = VISO , t = 60s (qualification); VTEST = 1.2 × VISO , t = 1s (100% production) 5000 VRMS
(1) Intrinsic Insulation Capability: this is the capability of the device assuming material group matching the package, 2000m altitude, and pollution degree 1. Please refer to the VDE and UL sections for certification values to a specific standard or rating. Please refer to IEC 60664-1, IEC 60664-3 or relevant standard for other use cases, ratings (basic or reinforced), altitudes and pollution degrees.
(2) Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal in certain cases. Techniques such as inserting grooves, ribs, or both on a printed circuit board are used to help increase these specifications.
(3) This device is suitable for safe electrical insulation only within the safety ratings. Compliance with the safety ratings shall be ensured by means of suitable protective circuits.
(4) Testing is carried out in air to determine the surge immunity of the package.
(5) Testing is carried out in oil to determine the intrinsic surge immunity of the isolation barrier.
(6) Apparent charge is electrical discharge caused by a partial discharge (pd).
(7) All pins on each side of the barrier tied together creating a two-pin device.