SLLSFY7B November   2025  – August 2026 ISOW6441 , ISOW6442

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Ratings
    6. 5.6  Insulation Specifications
    7. 5.7  Safety-Related Certifications
    8. 5.8  Safety Limiting Values
    9. 5.9  Electrical Characteristics - Power Converter
    10. 5.10 Supply Current Characteristics - Power Converter
    11. 5.11 Electrical Characteristics - Isolation Channel - VDD = 5V, VDDL = 5V, VISO=5V
    12. 5.12 Supply Current Characteristics - Isolation Channel - VDD = 5V,  VDDL = 5V, VISO = 5V
    13. 5.13 Electrical Characteristics - Isolation Channel - VDD = 5V, VDDL = 5V, VISO=3.3V
    14. 5.14 Supply Current Characteristics - Isolation Channel - VDD = 5V,  VDDL = 5V, VISO = 3.3V
    15. 5.15 Electrical Characteristics - Isolation Channel - VDD = 3.3V, VDDL = 3.3V, VISO = 3.3V
    16. 5.16 Supply Current Characteristics - Isolation Channel - VDD = 3.3V, VDDL = 3.3V, VISO = 3.3V
    17. 5.17 Electrical Characteristics - Isolation Channel - VDDL = 2.5V
    18. 5.18 Supply Current Characteristics - Isolation Channel - VDDL = 2.5V
    19. 5.19 Switching Characteristics - VDDL = 5V, VISO = 5V
    20. 5.20 Switching Characteristics - VDDL = 3.3V, VISO = 3.3V
    21. 5.21 Switching Characteristics - VDDL = 2.5V, VISO = 5V
    22. 5.22 Switching Characteristics - VDDL = 2.5V, VISO = 3.3V
    23. 5.23 Insulation Characteristics Curves
    24. 5.24 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
      1. 7.1.1 Power Isolation
      2. 7.1.2 Signal Isolation
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Electromagnetic Compatibility (EMC) Considerations
      2. 7.3.2 Power-Up and Power-Down Behavior
      3. 7.3.3 Protection Features
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device I/O Schematics
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 PCB Material
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1.     PACKAGE OPTION ADDENDUM
    2. 11.1 Tape and Reel Information

8.2.1 Design Requirements

To design with this device, use the parameters listed in Table 8-1.

Table 8-1 Design Parameters
PARAMETERVALUE
VDD input voltage3V to 5.5V
VDDL input voltage

2.25V to 5.5V

VDD decoupling capacitors10µF + 0.01µF + optional additional capacitance
VDDL decoupling capacitors0.1µF + optional additional capacitance
VISO decoupling capacitors10µF + 0.01µF + optional additional capacitance

Because of very-high current flowing through the ISOW6441 device VDD and VISOsupplies, higher decoupling capacitors typically provide better noise and ripple performance. Although a 10µF capacitor is adequate, higher decoupling capacitors (such as 47µF) on both the VISO and VDD pins to the respective grounds are strongly recommended to achieve the best performance.