SLLSG34 March   2025 THVD8000T

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 ESD Ratings - IEC Specifications
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Thermal Information
    6. 5.6 Electrical Characteristics
    7. 5.7 Power Dissipation Characteristics
    8. 5.8 Switching Characteristics
    9. 5.9 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 OOK Modulation with F_SET pin
      2. 7.3.2 OOK Demodulation
      3. 7.3.3 Transmitter Timeout
      4. 7.3.4 Polarity Free Operation
      5. 7.3.5 Glitch Free Mode Change
      6. 7.3.6 Integrated IEC ESD and EFT Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 OOK Mode
      2. 7.4.2 Thermal shutdown (TSD)
  9. 8 Application Information Disclaimer
    1. 8.1 Application information
    2. 8.2 Typical application (OOK mode)
      1. 8.2.1 Design requirements
        1. 8.2.1.1 Carrier frequency
      2. 8.2.2 Detailed design procedure
        1. 8.2.2.1 Inductor value selection
        2. 8.2.2.2 Capacitor value selection
      3. 8.2.3 Application Curves
    3. 8.3 Power supply recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

5.7 Power Dissipation Characteristics

Over operating free-air temperature range (unless otherwise noted). All typical values are at 25°C and supply voltage of VCC = 5 V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
PDOOK Chip power dissipation in OOK mode MODE = VCC, RL = 60 Ω, no CL f0 = 125 kHz, 12.5 kHz (25 kbps) clock pattern as data
 		 60 80 mW
f0 = 5 MHz, 500 kHz (1 Mbps) clock pattern as data
 		 90 125 mW