SLOS053E October 1987 – July 2025 TLC27L4 , TLC27L4A , TLC27L4B , TLC27L9
PRODUCTION DATA
Inadequate test time is a frequent problem, especially when testing CMOS devices in a high-volume, short-test-time environment. Internal capacitances are inherently higher in CMOS than in bipolar and BiFET devices and require longer test times than bipolar and BiFET devices. The problem becomes more pronounced with reduced supply levels and lower temperatures.