SLOS486B June   2007  – March 2025 TL4050A , TL4050B , TL4050C

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings #GUID-0C3A28AF-EAFE-4103-875D-294A55A12D2F/SLOS4567624
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  TL4050x25I Electrical Characteristics
    5. 5.5  TL4050x25Q Electrical Characteristics
    6. 5.6  TL4050x41I Electrical Characteristics
    7. 5.7  TL4050x41Q Electrical Characteristics
    8. 5.8  TL4050x50I Electrical Characteristics
    9. 5.9  TL4050x50Q Electrical Characteristics
    10. 5.10 TL4050x10I Electrical Characteristics
    11. 5.11 TL4050x10Q Electrical Characteristics
  7. 6 Typical Characteristics
  8. 7 Detailed Description
  9. 8 Application Information
    1.     21
    2. 8.1 Output Capacitor
    3. 8.2 SOT-23 Pin Connections
    4. 8.3 Use With an ADC or DAC
    5. 8.4 Cathode and Load Currents
  10. 9 Device and Documentation Support
    1. 9.1 Ordering Information
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

8.2 SOT-23 Pin Connections

There is a parasitic Schottky diode connected between pins 2 and 3 of the SOT-23 packaged device. Thus, pin 3 of the SOT-23 package must be left floating or connected to pin 2.