SLOSE83A March   2023  – January 2025 DRV8952

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1  Overview
    2. 6.2  Functional Block Diagram
    3. 6.3  Feature Description
    4. 6.4  Independent Half-bridge Operation
    5. 6.5  Current Sensing and Regulation
      1. 6.5.1 Current Sensing and Feedback
      2. 6.5.2 Current Sensing with External Resistor
      3. 6.5.3 Current Regulation
    6. 6.6  Charge Pump
    7. 6.7  Linear Voltage Regulator
    8. 6.8  VCC Voltage Supply
    9. 6.9  Logic Level Pin Diagram
    10. 6.10 Protection Circuits
      1. 6.10.1 VM Undervoltage Lockout (UVLO)
      2. 6.10.2 VCP Undervoltage Lockout (CPUV)
      3. 6.10.3 Logic Supply Power on Reset (POR)
      4. 6.10.4 Overcurrent Protection (OCP)
      5. 6.10.5 Thermal Shutdown (OTSD)
      6. 6.10.6 nFAULT Output
      7. 6.10.7 Fault Condition Summary
    11. 6.11 Device Functional Modes
      1. 6.11.1 Sleep Mode (nSLEEP = 0)
      2. 6.11.2 Operating Mode
      3. 6.11.3 nSLEEP Reset Pulse
      4. 6.11.4 Functional Modes Summary
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Driving Solenoid Loads
        1. 7.1.1.1 Solenoid Driver Typical Application
        2. 7.1.1.2 Thermal Calculations
          1. 7.1.1.2.1 Power Loss Calculations
          2. 7.1.1.2.2 Junction Temperature Estimation
        3. 7.1.1.3 Application Performance Plots
      2. 7.1.2 Driving Stepper Motors
        1. 7.1.2.1 Stepper Driver Typical Application
        2. 7.1.2.2 Power Loss Calculations
        3. 7.1.2.3 Junction Temperature Estimation
      3. 7.1.3 Driving Brushed-DC Motors
        1. 7.1.3.1 Brushed-DC Driver Typical Application
        2. 7.1.3.2 Power Loss Calculation
        3. 7.1.3.3 Junction Temperature Estimation
        4. 7.1.3.4 Driving Single Brushed-DC Motor
      4. 7.1.4 Driving Thermoelectric Coolers (TEC)
      5. 7.1.5 Driving Brushless DC Motors
    2. 7.2 Power Supply Recommendations
      1. 7.2.1 Bulk Capacitance
      2. 7.2.2 Power Supplies
    3. 7.3 Layout
      1. 7.3.1 Layout Guidelines
      2. 7.3.2 PCB Material Recommendation
      3. 7.3.3 Thermal Considerations
  9. 8 Package Thermal Considerations
    1. 8.1 DDW Package
      1. 8.1.1 Thermal Performance
        1. 8.1.1.1 Steady-State Thermal Performance
        2. 8.1.1.2 Transient Thermal Performance
  10. 9 Device and Documentation Support
    1. 9.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information

4 Pin Configuration and Functions

The DRV8952 is available in thermally-enhanced, 44-Pin HTSSOP (DDW) and 28-Pin HTSSOP (PWP) packages.
DRV8952 DDW Package, Top ViewFigure 4-1 DDW Package, Top View
DRV8952 PWP Package (28-Pin HTSSOP), Top ViewFigure 4-2 PWP Package (28-Pin HTSSOP), Top View
PINTYPEDESCRIPTION
NAMEDDW

PWP

VCP

1

1

Power

Charge pump output. Connect a X7R, 1-μF, 16-V ceramic capacitor from VCP to VM.
VM2, 11, 12, 212, 13PowerPower supply. Connect to motor supply voltage and bypass to PGND pins with 0.01-μF ceramic capacitors plus a bulk capacitor rated for VM.

IPROPI1

32

-

OutputCurrent sense output for half-bridge 1.
IPROPI2

31

-

Output

Current sense output for half-bridge 2.

IPROPI3

30

-

Output

Current sense output for half-bridge 3.

IPROPI4

29

-

Output

Current sense output for half-bridge 4.

EN1

37

20

Input

Enable input of half-bridge 1.

EN2

36

19

Input

Enable input of half-bridge 2.

EN3

35

18

Input

Enable input of half-bridge 3.

EN4

34

17

Input

Enable input of half-bridge 4.

IN1

41

25

Input

PWM input for half-bridge 1.

IN2

40

24

Input

PWM input for half-bridge 2.

IN3

39

23

Input

PWM input for half-bridge 3.

IN4

38

22

Input

PWM input for half-bridge 4.

CPH

44

28

Power

Charge pump switching node. Connect a X7R, 0.022-μF, VM rated ceramic capacitor from CPH to CPL.

CPL

43

27

PGND12

-

3

Power

Common power ground for half-bridges 1 and 2. Connect to system ground.
PGND34

-

12

Power

Common power ground for half-bridges 3 and 4. Connect to system ground.

PGND1

3

-

Power

Power ground for half-bridge 1. Connect to system ground.

PGND2

10

-

Power

Power ground for half-bridge 2. Connect to system ground.

PGND3

20

-

Power

Power ground for half-bridge 3. Connect to system ground.

PGND4

13

-

Power

Power ground for half-bridge 4. Connect to system ground.
OUT1

4, 5, 6

4, 5

OutputConnect to load terminal.
OUT2

7, 8, 9

6, 7

OutputConnect to load terminal.

OUT3

17, 18, 19

10, 11

Output

Connect to load terminal.

OUT4

14, 15, 16

8, 9

Output

Connect to load terminal.
GND

22, 23

14

Power

Device ground. Connect to system ground.
DVDD

24

15

PowerInternal LDO output. Connect a X7R, 0.47-μF to 1-μF, 6.3-V or 10-V rated ceramic capacitor to GND.

VREF

33

21

Input

Voltage reference input for setting current regulation threshold. DVDD can be used to provide VREF through a resistor divider.
VCC

25

-

Power

Supply voltage for internal logic blocks. When separate logic supply voltage is not available, tie the VCC pin to the DVDD pin.
nFAULT

26

16

Open DrainFault indication output. Pulled logic low with fault condition. Open drain output requires an external pullup resistor.

MODE

28

-

Input

This pin programs the output rise/fall time.

OCPM

27

-

Input

Determines the fault recovery method. Depending on the OCPM voltage, fault recovery can be either latch-off or auto-retry type.

nSLEEP

42

26

Input

Sleep mode input. Logic high to enable device; logic low to enter low-power sleep mode. A narrow nSLEEP reset pulse clears latched faults.

PAD---Thermal pad. Connect to system ground.