SLOU586 February   2026

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specifications
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 General Usage Information
    2. 2.2 Single Tone Measurement Setup
  7. 3Hardware Design Files
    1. 3.1 Schematic
    2. 3.2 PCB Layout
      1. 3.2.1 Stack-Up and Material
    3. 3.3 Bill of Materials (BOM)
  8. 4Additional Information
    1. 4.1 Trademarks
  9. 5Related Documentation

1.3 Specifications

This section covers the specifications and information about the RF connectors and header J1. Every pin of the header J1 has a detailed silkscreen for each pin. The summary is shown in Table 1-3.
Table 1-3 Specifications
Connector Parameter Input Value

PA_IN

PA RF Input

Max 16dBm

RX

LNA RF Output

ANT (TX path enabled)

RF Output

ANT (RX path enabled)

RF Input

Max 10dBm

J1.1

VCC_3P3V

Pull up for CTL0 (CEN) control pin

J1.2

GND

J1.3

CTL0

CEN control pin

J1.4

CTL0_DCARD

Unused

J1.5

GND

Pull down for CTL0 (CEN) control pin

J1.6

VCC_3P3V

Pull up for CTL1 (CIB) control pin

J1.7

CTL1_DCARD

Unused

J1.8

CTL1

CIB control pin

J1.9

VCC_3P3V

Pull up for CTL2 (CTR) control pin

J1.10

GND

Pull down for CIB control pin

J1.11

CTL2

CTR control pin

J1.12

CTL2_DCARD

Unused

J1.13

GND

Pull down for CTR control pin

J1.14

GND

J1.15

GND

J1.16

GND

J1.17

VOLT_PA_supply

VCC_PA power supply

J1.18

GND

J1.19

VOLT_PA_supply

VCC_PA power supply

J1.20

GND

J1.21

VOLT_3P3V_supply

VCC power supply

J1.22

GND

J1.23

VOLT_3P3V_supply

VCC power supply

J1.24

GND

J3.1

VDET

Monitor transmit RF power as voltage

J3.2

GND