SLPS764B September   2024  – December 2025 RES60A-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Absolute and Ratiometric Tolerances
      2. 6.3.2 Ultra-Low Noise
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Battery Stack Measurement
      2. 7.1.2 Gain Scaling the RES60A-Q1 With the RES11A-Q1
      3. 7.1.3 HIPOT and OVST
        1. 7.1.3.1 Mechanisms of HIPOT
        2. 7.1.3.2 Extended Validation of HIPOT
      4. 7.1.4 Hot Swap Response
      5. 7.1.5 High-frequency Response
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 PSpice® for TI
        2. 8.1.1.2 TINA-TI™ Simulation Software (Free Download)
        3. 8.1.1.3 TI Reference Designs
        4. 8.1.1.4 Analog Filter Designer
        5. 8.1.1.5 RES60A-Q1 Ratio and Voltage Error Calculator
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Typical Characteristics

at TA = 25°C (unless otherwise noted)

RES60A-Q1 tD Distribution
All ratios, n = 2718 ATE VD = 1000V
Figure 5-1 tD Distribution
RES60A-Q1 tD vs Divider Voltage
Figure 5-3 tD vs Divider Voltage
RES60A-Q1 RLV vs Temperature
Normalized to value at TA = 25°C
Figure 5-5 RLV vs Temperature
RES60A-Q1 tD vs Temperature
Figure 5-7 tD vs Temperature
RES60A-Q1 Attenuation vs Frequency, Uncompensated
Without CFILTER Normalized to attenuation at f = 100Hz
Figure 5-9 Attenuation vs Frequency, Uncompensated
RES60A-Q1 Attenuation vs Frequency, Compensated
CFILTER = 130pF Normalized to attenuation at f = 100Hz
Figure 5-11 Attenuation vs Frequency, Compensated
RES60A-Q1 Attenuation vs Frequency, Varying CFILTER
RES60A145
Figure 5-13 Attenuation vs Frequency, Varying CFILTER
RES60A-Q1 10V Step Response, Uncompensated
RES60A100 Without CFILTER
Figure 5-15 10V Step Response, Uncompensated
RES60A-Q1 10V Step Response, Uncompensated
RES60A100 Without CFILTER
Figure 5-17 10V Step Response, Uncompensated
RES60A-Q1 Long-term Drift
RES60A100, n = 37 VD = 1000V, TA = 85°C
Figure 5-19 Long-term Drift
RES60A-Q1 Absolute Tolerance Distribution
All ratios, n = 2718 ATE
Figure 5-2 Absolute Tolerance Distribution
RES60A-Q1 RHV vs Divider Voltage
Normalized to value at VD = 1000V
Figure 5-4 RHV vs Divider Voltage
RES60A-Q1 RHV vs Temperature
Normalized to value at TA = 25°C
Figure 5-6 RHV vs Temperature
RES60A-Q1 TCRratio Temperature Coefficient Distribution
All ratios TA = –40°C to +125°C, n = 444
Figure 5-8 TCRratio Temperature Coefficient Distribution
RES60A-Q1 Phase vs Frequency, Uncompensated
Without CFILTER
Figure 5-10 Phase vs Frequency, Uncompensated
RES60A-Q1 Phase vs Frequency, Compensated
CFILTER = 130pF
Figure 5-12 Phase vs Frequency, Compensated
RES60A-Q1 Phase vs Frequency, Varying CFILTER
RES60A100
Figure 5-14 Phase vs Frequency, Varying CFILTER
RES60A-Q1 10V Step Response, Compensated
RES60A100 CFILTER = 130pF
Figure 5-16 10V Step Response, Compensated
RES60A-Q1 10V Step Response, Compensated
RES60A100 CFILTER = 130pF
Figure 5-18 10V Step Response, Compensated