SLPS814 November   2025 RES21A-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 DC Measurement Configurations
    2. 6.2 AC Measurement Configurations
    3. 6.3 Error Notation and Units
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Ratiometric Matching for Low Gain Error
        1. 7.3.1.1 Absolute and Ratiometric Tolerances
      2. 7.3.2 Ratiometric Drift
      3. 7.3.3 Long-Term Stability
      4. 7.3.4 Humidity Resilience
      5. 7.3.5 Ultra-Low Noise
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Amplifier Feedback Circuit
        1. 8.1.1.1 Amplifier Feedback Circuit Example
      2. 8.1.2 Voltage Divider Circuit
        1. 8.1.2.1 Voltage Divider Circuit Example
        2. 8.1.2.2 Voltage-Divider Circuit Drift
      3. 8.1.3 Discrete Difference Amplifier
        1. 8.1.3.1 Difference-Amplifier Common-Mode Rejection Analysis
        2. 8.1.3.2 Difference-Amplifier Gain Error Analysis
      4. 8.1.4 Discrete Instrumentation Amplifiers
      5. 8.1.5 Fully Differential Amplifier
      6. 8.1.6 Unconventional Circuits
        1. 8.1.6.1 Single-Channel Voltage Divider
        2. 8.1.6.2 Single-Channel Amplifier Gain
          1. 8.1.6.2.1 Gain Scaling the RES60A-Q1 With the RES21A-Q1
        3. 8.1.6.3 Unconventional Instrumentation Amplifiers
    2. 8.2 Typical Application
      1. 8.2.1 Common-Mode Shifting Input Stage
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Examples
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
        2. 9.1.1.2 TINA-TI™ Simulation Software (Free Download)
        3. 9.1.1.3 TI Reference Designs
        4. 9.1.1.4 Analog Filter Designer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

8.1.1.1 Amplifier Feedback Circuit Example

Consider the following example. Divider 1 of the RES21A-Q1 is used in an inverting configuration, and divider 2 is used in a noninverting configuration. Both channels have the same input signal VIN, but the circuits have differing transfer functions of VOUT1 = VIN × (–G1) and VOUT2 = VIN × (1 + G2).

RES21A-Q1 Amplifier Gain Example Circuit Figure 8-3 Amplifier Gain Example Circuit

The following table shows the calculated results for several example conditions to illustrate the effects of the various errors. The impact of amplifier offset or input bias currents on VOUTx is not considered. Each row represents a different hypothetical condition for VIN, Gnom, tD1, and tD2.

Table 8-1 Amplifier Gain Example Circuit Conditions, Using RES21A-Q1
VIN Gnom tD1 tD2 G1 G2 VOUT1 VOUT2
1V 4 0ppm 0ppm 4 4 –4V 5V
1V 4 100ppm –10ppm 4.00040 3.99996 –4.00040 4.99996
1V 4 40ppm –80ppm 4.00016 3.99968 –4.00016 4.99968
1V 4 –80ppm 40ppm 3.99968 4.00016 –3.99968 5.00016
–2V 1.667 0ppm 0ppm 1.66667 1.66667 3.33333 –5.33333
–2V 1.667 100ppm –10ppm 1.66683 1.66665 3.33367 –5.33330
–2V 1.667 40ppm –80ppm 1.66673 1.66653 3.33347 –5.33307
–2V 1.667 –80ppm 40ppm 1.66653 1.66673 3.33307 –5.33347