SLPS814 November   2025 RES21A-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Parameter Measurement Information
    1. 6.1 DC Measurement Configurations
    2. 6.2 AC Measurement Configurations
    3. 6.3 Error Notation and Units
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Ratiometric Matching for Low Gain Error
        1. 7.3.1.1 Absolute and Ratiometric Tolerances
      2. 7.3.2 Ratiometric Drift
      3. 7.3.3 Long-Term Stability
      4. 7.3.4 Humidity Resilience
      5. 7.3.5 Ultra-Low Noise
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Amplifier Feedback Circuit
        1. 8.1.1.1 Amplifier Feedback Circuit Example
      2. 8.1.2 Voltage Divider Circuit
        1. 8.1.2.1 Voltage Divider Circuit Example
        2. 8.1.2.2 Voltage-Divider Circuit Drift
      3. 8.1.3 Discrete Difference Amplifier
        1. 8.1.3.1 Difference-Amplifier Common-Mode Rejection Analysis
        2. 8.1.3.2 Difference-Amplifier Gain Error Analysis
      4. 8.1.4 Discrete Instrumentation Amplifiers
      5. 8.1.5 Fully Differential Amplifier
      6. 8.1.6 Unconventional Circuits
        1. 8.1.6.1 Single-Channel Voltage Divider
        2. 8.1.6.2 Single-Channel Amplifier Gain
          1. 8.1.6.2.1 Gain Scaling the RES60A-Q1 With the RES21A-Q1
        3. 8.1.6.3 Unconventional Instrumentation Amplifiers
    2. 8.2 Typical Application
      1. 8.2.1 Common-Mode Shifting Input Stage
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Examples
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
        2. 9.1.1.2 TINA-TI™ Simulation Software (Free Download)
        3. 9.1.1.3 TI Reference Designs
        4. 9.1.1.4 Analog Filter Designer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

DC Measurement Configurations

An example of the circuit configuration used for dc measurements is shown in Figure 6-1. Voltage VDx refers to the voltage across a given divider, such as VD1 for divider 1. Voltage VRx refers to the voltage across a given resistor, such as VRIN1 for RIN1 or VRG1 for RG1.

RES21A-Q1 DC Measurement Terminology for Divider
          1 Figure 6-1 DC Measurement Terminology for Divider 1

When the RES21A-Q1 is used to set the gain of an op amp (shown in Figure 6-2), the ratio of the resistors in a divider sets the amplifier gain such that VOUT = –VIN × RG / RIN. Discrete difference-amplifier and instrumentation-amplifier circuits are variations on this use case. Typical and maximum parameter values for ratio tolerance (tD1, tD2) are expressed in terms of RGx / RINx to simplify calculations for these circuits. See Section 7.3.1 for more detailed discussion of these error terms.

RES21A-Q1 Amplifier Gain CircuitFigure 6-2 Amplifier Gain Circuit

Another valid use case of the RES21A-Q1 is a simple voltage divider. An example is shown in Figure 6-3. For this implementation, the midpoint voltage VMID is equal to the input voltage VD multiplied by RIN / (RIN + RG).

RES21A-Q1 Voltage-divider circuit Figure 6-3 Voltage-divider circuit

While calculation of the error for a voltage divider use case is slightly more complex, the gain error of a voltage divider circuit constructed with the RES21A-Q1 is always less than that of an amplifier gain circuit implemented with the same device. Put another way, the values of tD1 or tD2 specified for the RES21A-Q1 in gain circuits are overly conservative for voltage-divider circuits. Refer to Section 8.1.2 for detailed discussion and examples.

Figure 6-4 shows the circuit configuration used for CMRR calculations. For an ideal amplifier with no offset and infinite CMRR, the effective circuit CMRR is entirely a function of the matching of the resistors. See Section 8.1.3.1 and the Optimizing CMRR in Differential Amplifier Circuits With Precision Matched Resistor Divider Pairs application note for more information.

RES21A-Q1 CMRR Calculation Reference Schematic Figure 6-4 CMRR Calculation Reference Schematic