SLPS814 November   2025 RES21A-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 DC Measurement Configurations
    2. 6.2 AC Measurement Configurations
    3. 6.3 Error Notation and Units
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Ratiometric Matching for Low Gain Error
        1. 7.3.1.1 Absolute and Ratiometric Tolerances
      2. 7.3.2 Ratiometric Drift
      3. 7.3.3 Long-Term Stability
      4. 7.3.4 Humidity Resilience
      5. 7.3.5 Ultra-Low Noise
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Amplifier Feedback Circuit
        1. 8.1.1.1 Amplifier Feedback Circuit Example
      2. 8.1.2 Voltage Divider Circuit
        1. 8.1.2.1 Voltage Divider Circuit Example
        2. 8.1.2.2 Voltage-Divider Circuit Drift
      3. 8.1.3 Discrete Difference Amplifier
        1. 8.1.3.1 Difference-Amplifier Common-Mode Rejection Analysis
        2. 8.1.3.2 Difference-Amplifier Gain Error Analysis
      4. 8.1.4 Discrete Instrumentation Amplifiers
      5. 8.1.5 Fully Differential Amplifier
      6. 8.1.6 Unconventional Circuits
        1. 8.1.6.1 Single-Channel Voltage Divider
        2. 8.1.6.2 Single-Channel Amplifier Gain
          1. 8.1.6.2.1 Gain Scaling the RES60A-Q1 With the RES21A-Q1
        3. 8.1.6.3 Unconventional Instrumentation Amplifiers
    2. 8.2 Typical Application
      1. 8.2.1 Common-Mode Shifting Input Stage
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Examples
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
        2. 9.1.1.2 TINA-TI™ Simulation Software (Free Download)
        3. 9.1.1.3 TI Reference Designs
        4. 9.1.1.4 Analog Filter Designer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

7.3.1 Ratiometric Matching for Low Gain Error

The RES21A-Q1 is commonly used to establish the feedback path and set the gain of an amplifier circuit, or as a voltage divider to level-shift input signals. In both cases, the ratio of the resistors of the circuit describe the nominal circuit transfer function. Because the resistors of a given RES21A-Q1 are interdigitated and come from the same area of a silicon wafer, many of the absolute error terms of the resistors cancel out when calculating the actual or effective circuit transfer function. Detailed mathematical analyses and proofs are provided in Section 7.3.1.1, but for most use cases, the error terms reported in Electrical Characteristics are directly used to calculate the associated maximum and typical circuit gain error.

The RES21A-Q1 is specified with a maximum divider ratio tolerance of 500ppm, effectively meaning that the relationship between the actual divider ratio Gx and nominal ratio Gnom of a given divider x is described by the following:

Equation 6. G x = G nom × 1+ t Dx

such that tDx ≤ 500ppm. For example, a RES21A40-Q1 has a nominal gain of Gnom = 4. If a particular unit has tD1 = 130ppm and tD2 = –40ppm, the effective gains G1 and G2 are calculated as

Equation 7. G 1 = G nom × 1+ t D1 = 4 × 1+0.00013 = 4.00052
Equation 8. G 2 = G nom × 1+ t D2 = 4 × 1–0.00004 = 3.99984

The RES21A-Q1 is specified with a maximum divider matching tolerance of 1000ppm, meaning that the relationship between the ratio of divider 1 (G1) and ratio of divider 2 (G2) is described by the following:

Equation 9. t M = t D2 – t D1 = G 2 – G 1 G nom

By definition, |tM| ≤ 1000ppm. As a result of the interdigitation of the two dividers, the actual typical magnitude of tM is about an order of magnitude less than this maximum value, depending on the specific RES21A-Q1 device. This value is used to approximate the common-mode rejection ratio (CMRR) when implementing a difference amplifier circuit. For example, typical tM for the RES21A40-Q1 is approximately 38ppm, and the typical CMRR is 92.3dB.