SLUAA11B February   2020  – August 2021 BQ769142 , BQ76922 , BQ76942 , BQ76952

 

  1.   Trademarks
  2. 1Direct Commands
    1. 1.1 Alarm Enable - 0x66
    2. 1.2 Cell 1 Voltage - 0x14
    3. 1.3 Internal Temperature - 0x68
    4. 1.4 CC2 Current - 0x3A
  3. 2Subcommands
    1. 2.1 DEVICE_NUMBER - 0x0001
    2. 2.2 MANUFACTURING STATUS - 0x0057
    3. 2.3 FET_ENABLE - 0x0022
    4. 2.4 RESET - 0x0012
  4. 3Reading and Writing RAM Registers
    1. 3.1 Read 'Enabled Protections A'
    2. 3.2 Enter CONFIG_UPDATE Mode
    3. 3.3 Write 'Enabled Protections A'
    4. 3.4 Write 'VCell Mode'
    5. 3.5 Exit CONFIG_UPDATE Mode
  5. 4I2C With CRC
  6. 5SPI With CRC Examples
    1. 5.1 Direct Command Example: Alarm Enable - 0x66
    2. 5.2 Direct Command Example: Cell 1 Voltage - 0x14
    3. 5.3 Subcommand Example: Device Number - 0x0001
    4. 5.4 Subcommand Example: FET_ENABLE - 0x0022
    5. 5.5 Subcommand Example: RESET - 0x0012
    6. 5.6 RAM Register Read Example: Enabled Protections A
    7. 5.7 RAM Register Write Example: Enabled Protections A
  7. 6Simple Code Examples
  8. 7References
  9. 8Revision History

4 I2C With CRC

The I2C interface on the BQ769x2 family includes an optional CRC check. The CRC feature can be enabled in the Settings:Configuration:Comm Type register. If this register is changed while using BQStudio, the SWAP_COMM_MODE() subcommand should be executed and then BQStudio should be restarted so that it can detect the new communication mode. Two examples follow of I2C waveform captures with the CRC check enabled.

The CRC for the first data byte is computed on all of the bytes after the I2C start up to and including the first data byte. For every data byte after the first byte, the CRC byte is computed for only that byte. In Figure 4-1, using the FET_ENABLE subcommand, the CRC for the first byte is computed for [0x10 0x3E 0x22] - the resulting CRC is 0x63. The CRC for the second byte [0x00] is 0x00.

GUID-AB15ABA5-E0BA-4D76-A3FC-1CC83557CAF5-low.png Figure 4-1 Captured I2C Waveform for FET_ENABLE Subcommand With CRC

Figure 4-2, using the VCell 1 command, the CRC for the first byte is computed for [0x10 0x14 0x11 0x68] - the resulting CRC is 0x33. The CRC for the second byte [0x0B] is 0x31.

GUID-C8CFD3D0-3338-4DCA-A417-AE9D768B9DAB-low.png Figure 4-2 Captured I2C Waveform for VCell 1 Command With CRC