SLUAA11B February   2020  – August 2021 BQ769142 , BQ76922 , BQ76942 , BQ76952

 

  1.   Trademarks
  2. 1Direct Commands
    1. 1.1 Alarm Enable - 0x66
    2. 1.2 Cell 1 Voltage - 0x14
    3. 1.3 Internal Temperature - 0x68
    4. 1.4 CC2 Current - 0x3A
  3. 2Subcommands
    1. 2.1 DEVICE_NUMBER - 0x0001
    2. 2.2 MANUFACTURING STATUS - 0x0057
    3. 2.3 FET_ENABLE - 0x0022
    4. 2.4 RESET - 0x0012
  4. 3Reading and Writing RAM Registers
    1. 3.1 Read 'Enabled Protections A'
    2. 3.2 Enter CONFIG_UPDATE Mode
    3. 3.3 Write 'Enabled Protections A'
    4. 3.4 Write 'VCell Mode'
    5. 3.5 Exit CONFIG_UPDATE Mode
  5. 4I2C With CRC
  6. 5SPI With CRC Examples
    1. 5.1 Direct Command Example: Alarm Enable - 0x66
    2. 5.2 Direct Command Example: Cell 1 Voltage - 0x14
    3. 5.3 Subcommand Example: Device Number - 0x0001
    4. 5.4 Subcommand Example: FET_ENABLE - 0x0022
    5. 5.5 Subcommand Example: RESET - 0x0012
    6. 5.6 RAM Register Read Example: Enabled Protections A
    7. 5.7 RAM Register Write Example: Enabled Protections A
  7. 6Simple Code Examples
  8. 7References
  9. 8Revision History

3.3 Write 'Enabled Protections A'

In this example, the CUV (undervoltage) protection feature is enabled along with the default protections. This requires writing 0x8C to RAM address 0x9261. The checksum is calculated on the address and data (0x61, 0x92, 0x8C) and is the complement of the sum of these bytes. The length also includes the two bytes for device address and command address for a total length of 5.

GUID-665F2A85-8231-468E-94DD-D91AEC5059E1-low.png Figure 3-3 Captured Waveform for Writing to Enabled Protections A