SLUSAS0F December   2011  – July 2025 BQ2946

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Options
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Sense Positive Input for V1
      2. 7.3.2 Output Drive, OUT
      3. 7.3.3 Supply Input, VDD
      4. 7.3.4 Thermal Pad, PWRPAD
    4. 7.4 Device Functional Modes
      1. 7.4.1 NORMAL Mode
      2. 7.4.2 OVERVOLTAGE Mode
      3. 7.4.3 Customer Test Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Application Configuration
      2. 8.1.2 29
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 System Example
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Third-Party Products Disclaimer
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

7.4.3 Customer Test Mode

Customer Test Mode (CTM) helps reduce test time for checking the overvoltage delay timer parameter once the circuit is implemented in the battery pack. To enter CTM, VDD should be set to at least 10V higher than V1 (see Figure 7-2). The delay timer is greater than 10ms, but considerably shorter than the timer delay in normal operation. To exit CTM, remove the VDD to V1 voltage differential of 10V so that the decrease in this value automatically causes an exit.

CAUTION:

Avoid exceeding any Absolute Maximum Voltages on any pins when placing the part into CTM. Also avoid exceeding Absolute Maximum Voltage for the cell voltage (V1–VSS). Stressing the pins beyond the rated limits may cause permanent damage to the device.

Figure 7-2 shows the timing for the CTM.

BQ2946 Timing for Customer Test Mode Figure 7-2 Timing for Customer Test Mode

Figure 7-3 shows the measurement for current consumption for the product for both VDD and Vx.

BQ2946 Configuration for IC Current Consumption Test Figure 7-3 Configuration for IC Current Consumption Test