SLUSF18B October 2023 – May 2026 BQ25638
PRODUCTION DATA
BQ25638 provides an integrated 12-bit ADC for the host to monitor various system parameters. The ADC_RATE bit allows continuous conversion or one-shot behavior.
To enable the ADC, the ADC_EN bit must be set to ‘1’. The ADC is disabled by default (ADC_EN = 0) to conserve power. The ADC is allowed to operate if either VBUS > VPOORSRC or VBAT > VBAT_LOWV is valid. If ADC_EN is set to ‘1’ before VBUS or VBAT reach the respective valid thresholds, then ADC_EN stays '0'. While the charger is transitioning to HIZ mode, the ADC is temporarily suspended.
The ADC_DONE_STAT, ADC_DONE_FLAG bits is set when a conversion is complete in one-shot mode only. During continuous conversion mode, the ADC_DONE_STAT, ADC_DONE_FLAG bits have no meaning and remains at 0. In one-shot mode, the EN_ADC bit is set to 0 at the completion of the conversion, at the same time as the ADC_DONE_FLAG bit is set. In continuous mode, the EN_ADC bit remains at 1 until the user disables the ADC by setting the bit to 0.
The device offers an optional ADCIN input to monitor the value of an external signal up-to 1V.