SLUSFL5 March   2025 UCC5350L-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Function
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings (Automotive)
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Ratings
    6. 5.6  Insulation Specifications
    7. 5.7  Safety-Related Certifications
    8. 5.8  Safety Limiting Values
    9. 5.9  Electrical Characteristics
    10. 5.10 Switching Characteristics
    11. 5.11 Insulation Characteristics Curves
    12. 5.12 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Propagation Delay, Inverting, and Noninverting Configuration
      1. 6.1.1 CMTI Testing
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Supply
      2. 7.3.2 Input Stage
      3. 7.3.3 Output Stage
      4. 7.3.4 Protection Features
        1. 7.3.4.1 Undervoltage Lockout (UVLO)
        2. 7.3.4.2 Active Pulldown
        3. 7.3.4.3 Short-Circuit Clamping
        4. 7.3.4.4 Active Miller Clamp
    4. 7.4 Device Functional Modes
      1. 7.4.1 ESD Structure
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Designing IN+ and IN– Input Filter
        2. 8.2.2.2 Gate-Driver Output Resistor
        3. 8.2.2.3 Estimate Gate-Driver Power Loss
        4. 8.2.2.4 Estimating Junction Temperature
        5. 8.2.2.5 Selecting VCC1 and VCC2 Capacitors
          1. 8.2.2.5.1 Selecting a VCC1 Capacitor
          2. 8.2.2.5.2 Selecting a VCC2 Capacitor
          3. 8.2.2.5.3 Application Circuits with Output Stage Negative Bias
      3. 8.2.3 Application Curve
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 PCB Material
  12. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Certifications
    4. 11.4 Receiving Notification of Documentation Updates
    5. 11.5 Support Resources
    6. 11.6 Trademarks
    7. 11.7 Electrostatic Discharge Caution
    8. 11.8 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

5.9 Electrical Characteristics

VCC1 = 3.3 V or 5 V, 0.1-µF capacitor from VCC1 to GND1, VCC2= 15 V, 1-µF capacitor from VCC2 to VEE2, CL = 100-pF, TA = –40°C to +125°C, (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENTS
IVCC1 Input Supply Quiescent Current 1.67 2.4 mA
IVCC2 Output Supply Quiescent Current 1.1 1.8 mA
VCC1 SUPPLY VOLTAGE UNDERVOLTAGE THRESHOLDS
VVCC1_ON VCC1 UVLO Rising Threshold 2.6 2.8 V
VVCC1_OFF VCC1 UVLO Falling Threshold 2.4 2.5
VVCC1_HYS VCC1 UVLO Threshold Hysteresis 0.1
VCC2 SUPPLY VOLTAGE UNDERVOLTAGE THRESHOLDS AND DELAY
VVCC2_ON VCC2 UVLO Rising Threshold 12 13 V
VVCC2_OFF VCC2 UVLO Falling Threshold 10.3 11
VVCC2_HYS VCC2 UVLO Threshold Hysteresis 1
LOGIC I/O
VIT+(IN) Input High Threshold Voltage 0.55*VCC1 0.7*VCC1 V
VIT-(IN) Input Low Threshold Voltage 0.3*VCC1 0.45*VCC1
Vhys(IN) Input Threshold Hysteresis 0.1*VCC1
IIH INx Pin High Level Input Leakage Current IN+ = VCC1 40 240 µA
IIL INx Pin Low Level Input Leakage Current IN- = GND1 -240 -40 µA
IIL IN- Pin Low Level Input Leakage Current IN- = GND1 - 5V -310 -80 µA
GATE DRIVER STAGE
IOH Peak Output Source Current IN+=high, IN-=low 5 10 A
IOL Peak Output Sink Current IN+=low, IN-=high 5 10 A
VOH High Level Output Voltage (VCC2 - OUT) IOUT = -20mA  100 240 mV
VOL Low Level Output Voltage (OUT) IN+ = low, IN- = high; IOUT = 20mA  3 7 mV
SHORT CIRCUIT CLAMPING
VCLP-OUT Clamping Voltage (VOUT - VCC2) IN+ = high, IN- = low, tCLAMP = 10μs, IOUT = 500mA 1 1.3 V
VCLP-OUT Clamping Voltage (VEE2 - VOUT) IN+ = low, IN- = high, tCLAMP = 10μs, IOUT = -500mA 1.5 V
VCLP-OUT Clamping Voltage (VEE2 - VOUT) IN+ = low, IN- = high, tCLAMP = 10μs, IOUT = -20mA 0.9 1 V
MILLER CLAMP
VCLAMP Low-Level Clamp Voltage ICLAMP = 20mA 7 13 mV
ICLAMP Clamp Low-Level Current VCLAMP = VEE2 + 15V 5 10 A
ICLAMP(L) Clamp Low-Level Current For Low Output Voltage VCLAMP = VEE2 + 2V 5 10 A
VCLAMP-TH Clamp Threshold Voltage 2.1 2.3 V
ACTIVE PULL-DOWN
VOUTSD Active Pulldown Votlage on  OUT IOUT = 0.1 x IOUT(typ), VCC2 = open 1.8 2.5 V