SLUUCB9A June   2020  – January 2021 BQ25730 , BQ25731

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 EVM Features
    2. 1.2 General Description
  3. 2Test Summary
    1. 2.1 Definitions
    2. 2.2 Equipment
    3. 2.3 Equipment Setup
    4. 2.4 Procedure
      1. 2.4.1 Charge Function
      2. 2.4.2 OTG Function
  4. 3Bill of Materials, Board Layout, and Schematics
    1. 3.1 Bill of Materials
    2. 3.2 Board Assembly Layout
    3. 3.3 Schematic
  5.   Revision History

General Description

The BQ2573X evaluation modules are complete charger modules for evaluating an I2C-controlled buck boost charge using the BQ2573X devices.

The BQ2573X EVM does not include the EV2400 interface board. To evaluate the BQ2573X EVM, order an EV2400 interface board separately.

The BQ2573X is a synchronous NVDC-1 battery buck boost charge controller, offering a low component count, high efficiency solution for space-constrained, multi-chemistry battery charging applications.

The BQ2573X charges the battery from a wide range of input sources including a 5-V USB adapter to a high-voltage USB PD source and traditional adapters.

During power up, the charger sets the converter to buck, boost, or buck-boost configuration based on the input source and battery conditions. During the charging cycle, the charger automatically transits among buck, boost, and buck-boost configuration without host control.

The BQ2573X monitors adapter current, battery current, and system power. The flexible programmed PROCHOT output goes directly to the CPU for throttle back, when needed.

For more details on register functions, see the BQ25730 I2C 1-5 Cell Narrow VDC Buck-Boost Battery Charge Controller With System Power Monitor and Power Path Control and BQ25731 I2C 1-5 Cell Narrow VDC Buck-Boost Battery Charge Controller Data Sheets.

Table 1-1 lists the I/O descriptions.

Table 1-1 I/O Description
Jack Description
J1–VIN Input: positive terminal
J1–PGND Input: negative terminal (ground terminal)
J2-CHRG_OK CHRG_OK output
J2-OTG/VAP External OTG/VAP disable pin; Logic LOW to disable OTG/VAP
J2-CELL_CONTROL External battery removal control; Logic high to pull CELL pin down
J2-ILIM_HIZ External converter disable; Logic LOW to enable HIZ mode
J3-SCL SMBUS/I2C SCL
J3-GND Ground
J3–SDA SMBUS/I2C SDA
J4-GND Ground
J4-CMPIN External CMPIN pin input
J4-CMPOUT CMPOUT pin output
J5-VBAT Connected to battery pack output
J5-PGND Ground
J6-VSYS Connected to system output
J6-PGND Ground
J7–SDA SMBUS/I2C SDA
J7-SCL SMBUS/I2C SCL
J7-GND Ground

Table 1-2 displays the controls and key parameters settings.

Table 1-2 Controls and Key Parameters Setting
Jumper Description Factory Setting
JP2 Jumper on: Forward Mode
Jumper off: Enable OTG
Installed
JP3 CELL setting
1S: JP3(1-2) measure CELL pin voltage 1.2 V
2S: JP3(3-4) measure CELL pin voltage 2.7 V
3S: JP3(5-6) measure CELL pin voltage 3.9 V
4S: JP3(7-8) measure CELL pin voltage 4.2 V
5S: JP3(9-10) measure CELL pin voltage 6.0 V
JP3(3-4) installed
JP4 Jumper on: Bat removal
Jumper off: Cell setting by JP3
Not installed
JP6 HIZ Enable
Jumper on: Enable HiZ mode.
Jumper off: ILIM is set by external resistor divider
Not installed
JP8 Jumper on: Onboard LDO to drive the EVM 3V3
Jumper off: disconnect onboard LDO to drive the EVM 3V3
Installed

Table 1-3 lists the recommended operating conditions.

Table 1-3 Recommended Operating Conditions
Symbol Description MIN TYP MAX Unit
Supply voltage, VIN Input voltage from ac adapter input 3.5 5/12/20 26 V
Battery voltage, VBAT Voltage applied at VBAT terminal 0 23 V
Supply current, IAC Maximum input current from ac adapter input 0 10 A
Output current, IOUT Output current 0 15 A
Operating junction temperature range, TJ 0 125 °C