SLUUCY8 December   2023 BQ77307

 

  1.   1
  2.   Read This First
    1.     About This Manual
    2.     Battery Notational Conventions
    3.     Trademarks
    4.     Glossary
  3. 1 Introduction
  4. 2 Device Description
    1. 2.1 Overview
    2. 2.2 Functional Block Diagram
  5. 3 Device Configuration
    1. 3.1 Direct Commands and Subcommands
    2. 3.2 Configuration Using OTP or Registers
    3. 3.3 Data Formats
      1. 3.3.1 Unsigned Integer
      2. 3.3.2 Integer
      3. 3.3.3 Hex
  6. 4 Device Security
  7. 5 Protection Subsystem
    1. 5.1  Protections Overview
    2. 5.2  Protection Evaluation and Detection
    3. 5.3  Protection FET Drivers
    4. 5.4  Cell Overvoltage Protection
    5. 5.5  Cell Undervoltage Protection
    6. 5.6  Short Circuit in Discharge Protection
    7. 5.7  Overcurrent in Charge Protection
    8. 5.8  Overcurrent in Discharge 1 and 2 Protections
    9. 5.9  Current Protection Latch
    10. 5.10 CHG Detector
    11. 5.11 Overtemperature in Charge Protection
    12. 5.12 Overtemperature in Discharge Protection
    13. 5.13 Internal Overtemperature Protection
    14. 5.14 Undertemperature in Charge Protection
    15. 5.15 Undertemperature in Discharge Protection
    16. 5.16 Cell Open Wire Detection
    17. 5.17 Voltage Reference Diagnostic Protection
    18. 5.18 VSS Diagnostic Protection
    19. 5.19 REGOUT Diagnostic Protection
    20. 5.20 LFO Oscillator Integrity Diagnostic Protection
    21. 5.21 Internal Factory Trim Diagnostic Protection
  8. 6 Device Status and Controls
    1. 6.1 0x00 Control Status() and 0x12 Battery Status() Commands
    2. 6.2 Unused VC Cell Input Pins
    3. 6.3 LDOs
    4. 6.4 ALERT Pin Operation
    5. 6.5 TS Pin Operation
    6. 6.6 Device Event Timing
  9. 7 Operational Modes
    1. 7.1 Overview of Operational Modes
    2. 7.2 NORMAL Mode
    3. 7.3 SHUTDOWN Mode
    4. 7.4 CONFIG_UPDATE Mode
  10. 8 I2C Serial Communications
    1. 8.1 I2C Serial Communications Interface
  11. 9 Commands and Subcommands
    1. 9.1 Direct Commands
    2. 9.2 Bit Field Definitions for Direct Commands
      1. 9.2.1  Safety Alert A Register
      2. 9.2.2  Safety Status A Register
      3. 9.2.3  Safety Alert B Register
      4. 9.2.4  Safety Status B Register
      5. 9.2.5  Battery Status Register
      6. 9.2.6  Alarm Status Register
      7. 9.2.7  Alarm Raw Status Register
      8. 9.2.8  Alarm Enable Register
      9. 9.2.9  FET CONTROL Register
      10. 9.2.10 REGOUT CONTROL Register
    3. 9.3 Command-only Subcommands
    4. 9.4 Subcommands with Data
    5. 9.5 Bitfield Definitions for Subcommands
      1. 9.5.1 DEVICE NUMBER Register
      2. 9.5.2 FW VERSION Register
      3. 9.5.3 HW VERSION Register
      4. 9.5.4 SECURITY KEYS Register
      5. 9.5.5 PROT RECOVERY Register
  12. 10Data Memory
    1. 10.1 Settings
      1. 10.1.1 Settings:Configuration
        1. 10.1.1.1  Settings:Configuration:Reserved
        2. 10.1.1.2  Settings:Configuration:Power Config
        3. 10.1.1.3  Settings:Configuration:REGOUT Config
        4. 10.1.1.4  Settings:Configuration:I2C Address
        5. 10.1.1.5  Settings:Configuration:I2C Config
        6. 10.1.1.6  Settings:Configuration:TS Mode
        7. 10.1.1.7  Settings:Configuration:Vcell Mode
        8. 10.1.1.8  Settings:Configuration:Default Alarm Mask
        9. 10.1.1.9  Settings:Configuration:FET Options
        10. 10.1.1.10 Settings:Configuration:Charge Detector Time
      2. 10.1.2 Settings:Protection
        1. 10.1.2.1 Settings:Protection:Enabled Protections A
        2. 10.1.2.2 Settings:Protection:Enabled Protections B
        3. 10.1.2.3 Settings:Protection:DSG FET Protections A
        4. 10.1.2.4 Settings:Protection:CHG FET Protections A
        5. 10.1.2.5 Settings:Protection:Both FET Protections B
        6. 10.1.2.6 Settings:Protection:Cell Open Wire Check Time
    2. 10.2 Protections
      1. 10.2.1 Protections:Cell Voltage
        1. 10.2.1.1 Protections:Cell Voltage:Cell Undervoltage Protection Threshold
        2. 10.2.1.2 Protections:Cell Voltage:Cell Undervoltage Protection Delay
        3. 10.2.1.3 Protections:Cell Voltage:Cell Undervoltage Protection Recovery Hysteresis
        4. 10.2.1.4 Protections:Cell Voltage:Cell Overvoltage Protection Threshold
        5. 10.2.1.5 Protections:Cell Voltage:Cell Overvoltage Protection Delay
        6. 10.2.1.6 Protections:Cell Voltage:Cell Overvoltage Protection Recovery Hysteresis
      2. 10.2.2 Protections:Current
        1. 10.2.2.1  Protections:Current:Overcurrent in Charge Protection Threshold
        2. 10.2.2.2  Protections:Current:Overcurrent in Charge Protection Delay
        3. 10.2.2.3  Protections:Current:Overcurrent in Discharge 1 Protection Threshold
        4. 10.2.2.4  Protections:Current:Overcurrent in Discharge 1 Protection Delay
        5. 10.2.2.5  Protections:Current:Overcurrent in Discharge 2 Protection Threshold
        6. 10.2.2.6  Protections:Current:Overcurrent in Discharge 2 Protection Delay
        7. 10.2.2.7  Protections:Current:Short Circuit in Discharge Protection Threshold
        8. 10.2.2.8  Protections:Current:Short Circuit in Discharge Protection Delay
        9. 10.2.2.9  Protections:Current:Latch Limit
        10. 10.2.2.10 Protections:Current:Recovery Time
      3. 10.2.3 Protections:Temperature
        1. 10.2.3.1  Protections:Temperature:Overtemperature in Charge Protection Threshold
        2. 10.2.3.2  Protections:Temperature:Overtemperature in Charge Protection Delay
        3. 10.2.3.3  Protections:Temperature:Overtemperature in Charge Protection Recovery
        4. 10.2.3.4  Protections:Temperature:Undertemperature in Charge Protection Threshold
        5. 10.2.3.5  Protections:Temperature:Undertemperature in Charge Protection Delay
        6. 10.2.3.6  Protections:Temperature:Undertemperature in Charge Protection Recovery
        7. 10.2.3.7  Protections:Temperature:Overtemperature in Discharge Protection Threshold
        8. 10.2.3.8  Protections:Temperature:Overtemperature in Discharge Protection Delay
        9. 10.2.3.9  Protections:Temperature:Overtemperature in Discharge Protection Recovery
        10. 10.2.3.10 Protections:Temperature:Undertemperature in Discharge Protection Threshold
        11. 10.2.3.11 Protections:Temperature:Undertemperature in Discharge Protection Delay
        12. 10.2.3.12 Protections:Temperature:Undertemperature in Discharge Protection Recovery
        13. 10.2.3.13 Protections:Temperature:Internal Overtemperature Protection Threshold
        14. 10.2.3.14 Protections:Temperature:Internal Overtemperature Protection Delay
        15. 10.2.3.15 Protections:Temperature:Internal Overtemperature Protection Recovery
    3. 10.3 Power
      1. 10.3.1 Power:Configuration
        1. 10.3.1.1 Power:Configuration:Voltage CHECK Time
        2. 10.3.1.2 Power:Configuration:Body Diode Threshold
      2. 10.3.2 Power:Shutdown
        1. 10.3.2.1 Power:Shutdown:Shutdown Cell Voltage
        2. 10.3.2.2 Power:Shutdown:Shutdown Stack Voltage
        3. 10.3.2.3 Power:Shutdown:Shutdown Temperature
    4. 10.4 Security
      1. 10.4.1 Security:Settings
        1. 10.4.1.1 Security:Settings:Security Settings
        2. 10.4.1.2 Security:Settings:Full Access Key Step 1
        3. 10.4.1.3 Security:Settings:Full Access Key Step 2
      2. 10.4.2 Data Memory Summary
  13. 11Revision History

3.1 Direct Commands and Subcommands

The BQ77307 device includes support for direct commands and subcommands. The direct commands are accessed using a 7-bit command address that is sent from a host through the device serial communications interface and either triggers an action, or provides a data value to be written to the device, or instructs the device to report data back to the host. Subcommands are additional commands that are accessed indirectly using the 7-bit command address space and provide the capability for block data transfers.

When a subcommand is initiated, a 16-bit subcommand address is first written to the 7-bit command addresses 0x3E (lower byte) and 0x3F (upper byte). The device initially assumes a read-back of data is needed, and auto-populates existing data into the 32-byte transfer buffer (which uses 7-bit command addresses 0x40–0x5F), and writes the checksum for this data into address 0x60. If the host instead intends to write data into the device, the host overwrites the new data into the transfer buffer, a checksum for the data into address 0x60, and the data length into address 0x61.

As soon as address 0x61 is written, the device checks the checksum written into 0x60 with the data written into 0x40-0x5F, and if this is correct, it proceeds to transfer the data from the transfer buffer into the device's memory. The checksum is the 8-bit modulo-256 sum of the subcommand bytes (0x3E and 0x3F) and the bytes used in the transfer buffer, then the result is bit-wise inverted. The verification cannot take place until the data length is written, so the device realizes how many bytes in the transfer buffer are included. Write the data length last, after the checksum has been written (they do not need to be written together as a word). The data length includes the two bytes in 0x3E and 0x3F, the two bytes in 0x60 and 0x61, and the length of data in the transfer buffer. Therefore, if the entire 32-byte transfer buffer is used, the data length is 0x24.

When the data length in 0x61 is read, the device automatically increments the address presently in 0x3E and 0x3F by 0x0020, and populates the transfer buffer with new readback data. This allows large portions of data memory to be read by continuous reading of the address space 0x40 to 0x61. If the host attempts to read the transfer buffer data starting at 0x40 while the device is still loading the data into the transfer buffer, the device clock stretches the I2C read transaction until the data is available.

Some subcommands are only used to initiate an action and do not involve sending or receiving data. In these cases, the host can simply write the subcommand into 0x3E and 0x3F, and it is not necessary to write the length and checksum or any further data. Note that if an auto-incremented address corresponds to a subcommand that does not involve data, the auto-incrementing does not cause that subcommand to be initiated.

The commands supported in the device are described in Commands and Subcommands. Single-byte commands are direct commands, while two-byte commands are subcommands. Data formats are described in Data Formats.

The most efficient approach to read the data from a subcommand (to minimize bus traffic) is shown below:

  1. Write lower byte of subcommand to 0x3E.
  2. Write upper byte of subcommand to 0x3F.
  3. Read back the subcommand from 0x3E and 0x3F, which echoes back the subcommand address sent in steps 1 and 2 (or the auto-incremented address from step 6).
  4. Read buffer starting at 0x40 for the expected length (reading the full 32 bytes is also acceptable).
  5. Read the checksum at 0x60 and verify it matches the data read over the length specified by the subcommand.
  6. If auto-incrementing is desired, read the data length at 0x61, at which point the device increments the address in 0x3E and 0x3F by 32 and repopulates the buffer with the next 32 bytes of data, then go to step 2.
Note: 0x61 provides the length of the buffer data plus 4 (that is, length of the buffer data plus the length of 0x3E and 0x3F plus the length of 0x60 and 0x61).

The checksum is calculated over 0x3E, 0x3F, and the length of buffer data specified by the subcommand, and it does not include the checksum or length in 0x60 and 0x61.

Write only 0 to command or subcommand bits denoted RSVD_0. Write only 1 to bits denoted RSVD_1.