SLUUCY8 December 2023 BQ77307
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
NORMAL | RSVD0 | SA | SS | SEC_1 | SEC_0 | RSVD0 | FET_EN |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
POR | RSVD0 | CFGUPDATE | ALERTPIN | CHG | DSG | CHGDETFLAG | RSVD0 |
Description: Provides flags related to battery status.
Bit | Field | Description |
---|---|---|
15 | NORMAL | This flag asserts when the device is in NORMAL mode.
0 = Indicates the device is not in NORMAL mode. 1 = Indicates the device is in NORMAL mode. |
13 | SA | This flag asserts if an enabled safety alert is present.
0 = Indicates an enabled safety alert is not present 1 = Indicates an enabled safety alert is present |
12 | SS | This flag asserts if an enabled safety fault is present.
0 = Indicates an enabled safety fault is not present 1 = Indicates an enabled safety fault is present |
11–10 | SEC_1–SEC_0 | SEC1:0 indicate the present security state of the device.
When in SEALED mode, device configuration cannot be read or written and some commands are restricted. When in FULLACCESS mode, unrestricted read and write access is allowed and all commands are accepted. 0 = 0: Device has not initialized yet. 1 = 1: Device is in FULLACCESS mode. 2 = 2: Unused. 3 = 3: Device is in SEALED mode. |
8 | FET_EN | This bit is set when the device is in autonomous FET control mode. The default value of this bit is set by the Settings:FET Options[FET_EN] bit in Data Memory upon exit of CONFIG_UPDATE mode. Its value can be modified
during operation using the FET_ENABLE() subcommand.
0 = Device is not in autonomous FET control mode, FETs are only enabled through manual command. 1 = Device is in autonomous FET control mode, FETs can be enabled by the device if no conditions or commands prevent them being enabled. |
7 | POR | This bit is set when the device fully resets. It is cleared upon exit of CONFIG_UPDATE mode. It can be used by the host to determine if any RAM configuration changes were lost due to a reset.
0 = Full reset has not occurred since last exit of CONFIG_UPDATE mode. 1 = Full reset has occurred since last exit of CONFIG_UPDATE and reconfiguration of any RAM settings is required. |
5 | CFGUPDATE | This bit indicates whether or not the device is in CONFIG_UPDATE mode. It is set after the SET_CFGUPDATE() subcommand is received and fully processed. Configuration settings can be changed only while this bit is set.
0 = Device is not in CONFIG_UPDATE mode. 1 = Device is in CONFIG_UPDATE mode. |
4 | ALERTPIN | This bit indicates whether the ALERT pin is asserted (pulled low).
0 = ALERT pin is not asserted (stays in hi-Z mode). 1 = ALERT pin is asserted (pulled low). |
3 | CHG | This bit indicates whether the CHG driver is enabled.
0 = CHG driver is disabled. 1 = CHG driver is enabled. |
2 | DSG | This bit indicates whether the DSG driver is enabled.
0 = DSG driver is disabled. 1 = DSG driver is enabled. |
1 | CHGDETFLAG | This bit indicates the value of the debounced CHG Detector signal.
0 = CHG Detector debounced signal is low. 1 = CHG Detector debounced signal is high. |