SLVAE51A November   2018  – October 2020 LM7310 , TPS2100 , TPS2101 , TPS2102 , TPS2103 , TPS2104 , TPS2105 , TPS2110 , TPS2111 , TPS2111A , TPS2112 , TPS2112A , TPS2113 , TPS2113A , TPS2114 , TPS2114A , TPS2115 , TPS2115A , TPS2120 , TPS2121 , TPS25947

 

  1.   Trademarks
  2. 1What is a Priority Power MUX?
  3. 2Control Method
    1. 2.1 Manual
    2. 2.2 Automatic
    3. 2.3 Both - Automatic + Manual Override
  4. 3Power MUX Topologies
    1. 3.1 Discrete
    2. 3.2 Semi-Integrated
    3. 3.3 Fully Integrated
  5. 4Switchover Method
    1. 4.1 Break-Before-Make vs. Diode Mode
    2. 4.2 What is Seamless Switchover?
    3. 4.3 Output Voltage Drop
    4. 4.4 Inrush Current
  6. 5Additional Protection
    1. 5.1 Overvoltage Protection
    2. 5.2 Overcurrent Protection
  7. 6Summary
  8. 7References
  9. 8Revision History

What is a Priority Power MUX?

A basic Power Multiplexer (Power MUX) selects between two or more input supplies to power a single output.

GUID-AFFFA144-29D0-425C-B142-954BFBB6118B-low.gif Figure 1-1 Power MUX Block Diagram

If there is no preference for which input supply to use, or if the preference is to always use the highest input voltage supply available, then the minimum requirement for a power MUX solution would be reverse current blocking for each input path. This can be accomplished using any combination of diodes or ICs which behave like a diode (such as Ideal Diode Controllers).

GUID-1A1F7251-3F60-4649-8B2B-CA215BCE1698-low.png Figure 1-2 Minimum Functionality for Power MUX Without Priority

A schottky or silicon diode will result in a voltage drop around 0.4 V or 0.7 V, respectively. Using an ideal diode controller will result in a much lower voltage drop (on the order of 10 mV to 100 mV and there will be a parasitic body diode which must be positioned to block reverse current when the switch detects reverse current or is disabled.

If there is a priority, then additional switches must be added to have full control over which path to enable. Reverse current blocking (through a diode or a FET) must remain present and now a MOSFET must be added to turn on/off each power path to the load.

GUID-08DBB599-5C77-4304-AC87-838BC87A60A1-low.png Figure 1-3 Example Priority Power MUX

The focus of this application note will be on priority power MUX solutions and how they can be implemented.