SLVAF01 October   2020 TPS55340

 

  1.   Trademarks
  2. 1Switching Node Voltage Stress from Flyback
    1. 1.1 Reflected Voltage, VOR
    2. 1.2 Leakage Inductance Factor
  3. 2Mitigating Voltage Spike on Switch Node
    1. 2.1 Zener or TVS Clamping
    2. 2.2 Forward Recovery Characteristic of Blocking Diode
  4. 3Design Example with TPS55340
    1. 3.1 Initial Key Designs and Test Results
    2. 3.2 Redesign Procedure to Mitigate Vsw
    3. 3.3 Using Blocking Diode that has a good Tfr
  5. 4Summary
  6. 5References

Leakage Inductance Factor

In addition to voltage stress (VIN + VOR), there is a large voltage spike at turned off moment that is caused by the stored energy in leakage inductance of primary winding. Basically, it is a fact that magnetic flux from one winding that does not couple to other winding 100%, so it remains as a leakage inductance in the circuit. One of methods to reduce leakage factor is to improve transformer winding structure such as interleaving winding. Figure 1-2 is the simulated result after adding a small amount of leakage inductance in primary side equivalently.

GUID-20200927-CA0I-FDZD-T6ZN-HGCBT4DX1DMG-low.png Figure 1-2 Switch Note Waveform with Leakage Inductance

As the simulated result, the stored energy in the leakage inductance turns to voltage spike immediately at turn off transient moment and then mainly resonates with the capacitance on the node. Usually it resonates under a few hundreds of MHz so it may cause EMI problems in the systems and need additional snubbing measures. Plus, if the voltage peak is higher than device’s AMR (Absolute Maximum Rating), it will lead to IC or FET’s damage issue either in the design stage or field.