SLVAFD0B may   2022  – september 2023 AM620-Q1 , AM623 , AM625 , AM625-Q1 , TPS65219 , TPS65219-Q1 , TPS65220

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2TPS65219 Overview
    1. 2.1 TPS65219 Functional Block Diagram
  6. 3TPS65219 Variants
    1. 3.1 TPS65219 NVMs for Industrial Applications
    2. 3.2 TPS65219-Q1 NVMs for Automotive Applications
  7. 4TPS6521905 User-Programmable NVM
  8. 5AM62x Core Voltage Selection
  9. 6VSYS Voltage Ramp
  10. 7Power Block Diagrams
    1. 7.1 TPS6521901 Powering AM62x
    2. 7.2 TPS6521902 Powering AM62x
    3. 7.3 TPS6521903 Powering AM62x
    4. 7.4 TPS6521904 Powering AM62x
    5. 7.5 TPS6521907 Powering AM62x
    6. 7.6 TPS6521908 Powering AM62x
    7. 7.7 TPS6521920W-Q1 Powering AM62x-Q1
  11. 8References
  12. 9Revision History

3.2 TPS65219-Q1 NVMs for Automotive Applications

Table 3-2 TPS65219-Q1 NVMs for AM62x-Q1 Automotive Applications
TPS6521920W-Q1
Use Case Vsys 3.3 V
VDD_CORE(2) 0.75 V
External Memory LDDR4
Technical Reference Manual (TRM) SLVUCN8
Hardware AM62x starter kit for low-power Sitara processors
BUCK1 Vout 0.75 V
Bandwidth High bandwidth
BUCK2 Vout 1.8 V
Bandwidth High bandwidth
BUCK3 Vout 1.1 V
Bandwidth High bandwidth
LDO1 Vout 3.3 V/1.8 V (Bypass)
LDO2 Vout 0.85 V
LDO3 Vout 1.8 V
LDO4 Vout 2.2 V
GPIOs GPO1 Disabled
GPO2 Enabled
GPIO Disabled
MODE/RESET Config Warm Reset
Polarity High= Normal operation

Low=Warm Reset
MODE/SBY Config Mode
Polarity High=Forced-PWM

Low=Auto-PFM
VSEL_SD/DDR Config SD
Rail LDO1
Polarity High = LDO1_VSET

Low = 1.8 V
EN/PB/VSENSE pin config Enable
First Supply detection (1) Enabled
(1) First Supply detection allows power-up as soon as supply voltage is applied, even if EN/PB/VSENSE pin is at OFF_REQ status. FSD can be used in combination with any ON-request configuration, EN, PB or VSENSE. At first power-up the EN/PB/VSENSE pin is treated as if it had a valid ON request.
(2) See Section 5 for a comparison of the two VDD_CORE operating points.