SLVAFI8 February   2023 TLC6C5748-Q1

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2Design Considerations for Low EMI
    1. 2.1 Design Considerations Overview
    2. 2.2 Considerations in Detail
      1. 2.2.1 Top-Level Architecture
      2. 2.2.2 High Frequency Signals
        1. 2.2.2.1  Original Setup
        2. 2.2.2.2  3.3 V I/O Voltage Instead of 5 V
        3. 2.2.2.3  Use Independent OSC for GSCLK With Spread Spectrum
        4. 2.2.2.4  Without Using Buffer on GSCLK
        5. 2.2.2.5  Using Snubber on GSCLK
        6. 2.2.2.6  Lower the Signal Frequency
        7. 2.2.2.7  Placement and PCB layout
        8. 2.2.2.8  ESD Enhancement
        9. 2.2.2.9  Demo and Test Results
        10. 2.2.2.10 Bench Test Results
  5. 3Summary
  6. 4References

High Frequency Signals

As discussed in previous sections, the pulse signals on the interface could be a noise source of EMI. Theoretically, a PWM signal with limited slew rate (shown as #FIG_CSL_H3L_FWB) could be written into Fourier series format as,

GUID-AA6D0566-41A9-468E-A1D6-E967E1EC5947-low.jpg Figure 2-1 PWM Signal Diagram
Equation 2. x t = A k T + 2 A k T n = 1 sin n π f 0 k n π f 0 k + sin n π f 0 t r n π f 0 t r cos [ 2 π n f 0 t - π n f 0 ( k - t r ) θ ]

To mitigate the EMI problem from noise source, E.Q 2 indicates several approaches to lower the energy in high frequency range. #FIG_CRH_43L_FWB shows the spectrum in frequency domain.

GUID-9FF02D48-43D8-4BD8-B432-C27696C9F4CD-low.jpg Figure 2-2 Fourier Series in Frequency Domain