3 Full-Scale Trade-offs

Some converters are flexible and can dedicate a few, out of the few thousand, Serial Peripheral Interface (SPI) registers to change the full-scale swing. Keep in mind that a design with a larger full-scale range generally yields a better signal-to-noise ratio (SNR). But better SNR performance usually decreases the harmonic performance of the spurious free dynamic range (SFDR). The SNR increases because the analog input signal swing can be larger now, assuming that the noise stays constant. Conversely, a smaller full-scale range enables better SFDR (typically better HD2 and HD3) performance; however, there is a slight sacrifice in SNR. See Figure 3-1 and Figure 3-2 to understand these trade-offs.

Figure 3-1 Minimum Full-Scale Value (430mVpp) = SFDR Increase or SNR Decrease

As shown in Figure 3-1 the input full-scale range changed from a default value of 800 mVpp to 430 mVpp. This reflects a slight increase in SFDR or HD2 and HD3. The input full-scale value changing from the default 800 mVpp to 1.0 Vpp yields a slight increase in SNR, as shown in Figure 3. Notice the HD2 and HD3 decrease in Figure 3-2 vs. Figure 3-1.

Figure 3-2 Maximum Full-Scale Value (1.0Vpp) = SNR Increase or SFDR Decrease

In either case, you can dial in the best AC performance for your application by optimizing the full-scale value.

Other SPI registers allows changes to the input impedance, possibly halving or doubling the input impedance on the differential inputs. This means that you can optimize the matching network when designing the frontend. The input full-scale range can once again change in value. Not all converters offer these features, but some do, which is easier than changing the frontend circuitry to accommodate different applications or adding additional components to the frontend network.