RF-sampling 12-bit ADC with dual-channel 5.2 GSPS or single-channel 10.4 GSPS
Product details
Parameters
Package | Pins | Size
Features
- ADC core:
- 12-bit resolution
- Up to 10.4 GSPS in single-channel mode
- Up to 5.2 GSPS in dual-channel mode
- Performance specifications:
- Noise floor (–20 dBFS, VFS = 1 VPP-DIFF):
- Dual-channel mode: –151.8 dBFS/Hz
- Single-channel mode: –154.4 dBFS/Hz
- ENOB (dual channel, FIN = 2.4 GHz): 8.6 Bits
- Noise floor (–20 dBFS, VFS = 1 VPP-DIFF):
- Buffered analog inputs with VCMI of 0 V:
- Analog input bandwidth (–3 dB): 8 GHz
- Usable input frequency range: > 10 GHz
- Full-scale input voltage (VFS, default): 0.8 VPP
- Noiseless aperture delay (tAD) adjustment:
- Precise sampling control: 19-fs Step
- Simplifies synchronization and interleaving
- Temperature and voltage invariant delays
- Easy-to-use synchronization features:
- Automatic SYSREF timing calibration
- Timestamp for sample marking
- JESD204C serial data interface:
- Maximum lane rate: 17.16 Gbps
- Support for 64b/66b and 8b/10b encoding
- 8b/10b modes are JESD204B compatible
- Optional digital down-converters (DDC):
- 4x, 8x, 16x and 32x complex decimation
- Four independent 32-Bit NCOs per DDC
- Peak RF Input Power (Diff): +26.5 dBm (+ 27.5 dBFS, 560x fullscale power)
- Programmable FIR filter for equalization
- Power consumption: 4 W
- Power supplies: 1.1 V, 1.9 V
All trademarks are the property of their respective owners.
Description
The ADC12DJ5200RF device is an RF-sampling, giga-sample, analog-to-digital converter (ADC) that can directly sample input frequencies from DC to above 10 GHz. ADC12DJ5200RF can be configured as a dual-channel, 5.2 GSPS ADC or single-channel, 10.4 GSPS ADC. Support of a useable input frequency range of up to 10 GHz enables direct RF sampling of L-band, S-band, C-band, and X-band for frequency agile systems.
The ADC12DJ5200RF uses a high-speed JESD204C output interface with up to 16 serialized lanes supporting up to 17.16 Gbps line rate. Deterministic latency and multi-device synchronization is supported through JESD204C subclass-1. The JESD204C interface can be configured to trade-off line rate and number of lanes. Both 8b/10b and 64b/66b data encoding schemes are supported. 64b/66b encoding supports forward error correction (FEC) for improved bit error rates. The interface is backwards compatible with JESD204B receivers.
Innovative synchronization features, including noiseless aperture delay adjustment and SYSREF windowing, simplify system design for multi-channel applications. Optional digital down converters (DDCs) are available to provide digital conversion to baseband and to reduce the interface rate. A programmable FIR filter allows on-chip equalization.
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | ADC12DJ5200RF 10.4-GSPS Single Channel or 5.2-GSPS Dual Channel, 12-bit, RF datasheet (Rev. B) | Oct. 20, 2020 |
Application note | Impact of PLL Jitter to GSPS ADC's SNR and Performance Optimization | Nov. 11, 2020 | |
Technical article | Keys to quick success using high-speed data converters | Oct. 13, 2020 | |
Application note | Powering Sensitive Noise ADC Designs with the TPS62913 Low-Noise Buck Converter | Sep. 30, 2020 | |
Technical article | Step-by-step considerations for designing wide-bandwidth multichannel systems | Jun. 04, 2019 | |
Technical article | So, what are S-parameters anyway? | May 23, 2019 | |
User guide | ADC12DJ5200RF Evaluation Module User's Guide | Apr. 05, 2019 | |
Technical article | How to achieve fast frequency hopping | Mar. 03, 2019 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
The ADC12DJ5200RF evaluation module (EVM) allows for the evaluation of device ADC12DJ5200RF. The ADC12DJ5200RF is a low-power, 12-bit, dual 5.2-GSPS/single 10.4-GSPS, RF-sampling analog-to-digital converter (ADC) with a buffered analog input, integrated digital down converter with programmable NCO (...)
Features
- Flexible transformer-coupled analog input to allow for a variety of sources and frequencies
- Easy-to-use software GUI to configure ADC12DJ5200RF, LMX2582, and LMK04828 devices for a variety of configurations through a USB interface
- Quickly evaluate ADC performance through high-speed data converter pro (...)
Description
Software development
Features
- Compatible with JEDEC JESD204a/b/c protocols
- Supports subclass 1 deterministic latency and multidevice synchronization
- Supported lane rates
- Up to 16.375 Gbps in 8b/10b mode
- Up to 20 Gbps in 64b/66b mode
- Supports all protocol related error detection and reporting features
- Integrated transport layer (...)
Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
In the concept phase, a frequency-planning tool enables fine tuning of both (...)
Features
- Frequency planning
- Analog filtering
- Decimation filter spur location
Reference designs
Design files
-
download TIDA-010128 Assembly Drawing.pdf (2981KB) -
download TIDA-010128 PCB.pdf (28701KB) -
download TIDA-010128 CAD Files.zip (37212KB) -
download TIDA-010128 Gerber.zip (13521KB) -
download TIDA-01028 & TIDA-010128 BOM (Rev. A).pdf (240KB)
Design files
-
download TIDA-01028 Assembly Drawing.pdf (2940KB) -
download TIDA-01028 PCB.pdf (28699KB) -
download TIDA-01028 CAD Files.zip (41928KB) -
download TIDA-01028 Gerber.zip (13521KB) -
download TIDA-01028 & TIDA-010128 BOM (Rev. A).pdf (240KB)
Design files
-
download TIDA-01027 BOM.pdf (209KB) -
download TIDA-01027 Assembly Drawing.pdf (878KB) -
download TIDA-01027 PCB.pdf (2971KB) -
download TIDA-01027 CAD Files.zip (2870KB) -
download TIDA-01027 Gerber.zip (765KB)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
FCBGA (AAV) | 144 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
TI E2E™ forums with technical support from TI engineers
Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.
If you have questions about quality, packaging or ordering TI products, see TI support.