SLVSAX9G September   2011  – November 2025 DRV8818

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Motor Driver Timing Switching Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 PWM H-Bridge Drivers
      2. 6.3.2 Current Regulation
      3. 6.3.3 Decay Mode
      4. 6.3.4 Microstepping Indexer
      5. 6.3.5 Protection Circuits
        1. 6.3.5.1 Overcurrent Protection (OCP)
        2. 6.3.5.2 Thermal Shutdown (TSD)
        3. 6.3.5.3 Undervoltage Lockout (UVLO)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Sleep Mode
      2. 6.4.2 Disable Mode
      3. 6.4.3 Active Mode
      4. 6.4.4 Decay Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Stepper Motor Speed
        2. 7.2.2.2 Current Regulation
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 Bulk Capacitance
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Heatsinking
      2. 7.4.2 Layout Example
      3. 7.4.3 Thermal Considerations
        1. 7.4.3.1 Power Dissipation
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

7.4.1 Layout Guidelines

Bypass the VMA and VMB pins to GND using low-ESR ceramic bypass capacitors with a recommended value of 0.1μF rated for VM. Place this capacitor as close to the VMA and VMB pins as possible with a thick trace or ground plane connection to the device GND pin.

Bypass the VMA and VMB pins to GND using an appropriate bulk capacitor. This component is often an electrolytic and is best located close to the DRV8818.

A low-ESR ceramic capacitor must be placed in between the CP1 and CP2 pins. TI recommends a value of 0.22μF rated for VM. Place this component as close to the pins as possible.

A low-ESR ceramic capacitor must be placed in between the VM and VCP pins. TI recommends a value of 0.22μF rated for 16V. Place this component as close to the pins as possible.

The PowerPAD integrated circuit package must be securely connected to a copper plane that is connected to system GND. For best performance, use a copper place with a large area to allow for thermal dissipation from the DRV8818A. See Application Note - Best Practices for Board Layout of Motor Drivers for more information on thermal management, routing techniques, capacitor placement, and grounding optimization for motor drivers.