SLVSBA2E July   2012  – July 2025 DRV8844

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Output Stage
      2. 6.3.2 Logic Inputs
      3. 6.3.3 Bridge Control
      4. 6.3.4 Charge Pump
      5. 6.3.5 Protection Circuits
        1. 6.3.5.1 Overcurrent Protection (OCP)
        2. 6.3.5.2 Thermal Shutdown (TSD)
        3. 6.3.5.3 Undervoltage Lockout (UVLO)
    4. 6.4 Device Functional Modes
      1. 6.4.1 nRESET and nSLEEP Operation
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Motor Voltage
      3. 7.2.3 Application Curves
    3.     Power Supply Recommendations
      1. 7.3.1 Bulk Capacitance
    4. 7.3 Layout
      1. 7.3.1 Layout Guidelines
      2. 7.3.2 Layout Example
      3. 7.3.3 Thermal Considerations
        1. 7.3.3.1 Heatsinking
      4. 7.3.4 Power Dissipation
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Community Resources
    3. 8.3 Trademarks
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

9 Revision History

Changes from Revision D (May 2016) to Revision E (July 2025)

  • Updated the numbering format for tables, figures, and cross-references throughout the document.Go
  • Removed OCP Typical specGo

Changes from Revision C (May 2015) to Revision D (May 2016)

  • Added parallel output connection to the Features section Go
  • Added SRC12, SRC34 to VNEG pins parameter to the Absolute Maximum Ratings table Go
  • Changed the Functional Block Diagram to show the change of pin 6 and 9 from VNEG to SRC12 and SRC34 Go
  • Added parallel output description and sense-resistor option to the Application Information section Go

Changes from Revision B (January 2015) to Revision C (May 2015)

Changes from Revision A (October 2012) to Revision B ()

  • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go