SLVSBF0D July   2012  – July 2026 TPS53015

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Drivers
      2. 6.3.2 5-Volt Regulator
      3. 6.3.3 Soft Start and Prebiased Soft-Start Time
      4. 6.3.4 Overcurrent Protection
      5. 6.3.5 Overvoltage and Undervoltage Protection
      6. 6.3.6 UVLO Protection
      7. 6.3.7 Thermal Shutdown
      8. 6.3.8 Power Good
    4. 6.4 Device Functional Modes
      1. 6.4.1 PWM Operation
      2. 6.4.2 Auto-skip Eco-Mode Control
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Determine the Inductance Value
        2. 7.2.2.2 Output Capacitor
        3. 7.2.2.3 Input Capacitor
        4. 7.2.2.4 Bootstrap Capacitor
        5. 7.2.2.5 VREG5 Capacitor
        6. 7.2.2.6 Choose Output Voltage Resistors
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

3 Description

The TPS53015 device is a single, adaptive on-time D-CAP2 control topology synchronous buck controller. The device enables system designers to complete the suite of various end equipment power bus regulators with cost effective low external component count and low standby current design. The main control loop for the TPS53015 uses the D-CAP2 control topology which provides a very fast transient response with no external compensation components. The adaptive on-time control supports seamless transition between PWM mode at higher load condition and Eco-mode operation at light load. Eco-mode operation allows the device to maintain high efficiency during lighter load conditions. The device is also able to adapt to both low equivalent series resistance (ESR) output capacitors such as POSCAP or SP-CAP and ultra-low ESR ceramic capacitors. The device provides convenient and efficient operation with input voltages from 4.5V to 28V and output voltage from 0.77V to 7V.

The TPS53015 is available in the 3mm × 3mm 10-pin VSSOP (DGS) package and is specified for an ambient temperature range of –40°C to 85°C.

Package Information
PART NUMBERPACKAGE(1)PACKAGE SIZE(2)
TPS53015DGS (VSSOP, 10)3mm × 4.9mm
(1) For more information, see Section 10.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
TPS53015 Simplified Application Simplified Application