SLVSFC9B October   2020  – March 2022 TPS25947

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
      1.      15
    8. 7.8 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Input Reverse Polarity Protection
      2. 8.3.2  Undervoltage Lockout (UVLO and UVP)
      3. 8.3.3  Overvoltage Lockout (OVLO)
      4. 8.3.4  Overvoltage Clamp (OVC)
      5. 8.3.5  Inrush Current, Overcurrent, and Short Circuit Protection
        1. 8.3.5.1 Slew Rate (dVdt) and Inrush Current Control
        2. 8.3.5.2 Circuit-Breaker
        3. 8.3.5.3 Active Current Limiting
        4. 8.3.5.4 Short-Circuit Protection
      6. 8.3.6  Analog Load Current Monitor
      7. 8.3.7  Reverse Current Protection
      8. 8.3.8  Overtemperature Protection (OTP)
      9. 8.3.9  Fault Response and Indication (FLT)
      10. 8.3.10 Auxiliary Channel Control (AUXOFF)
      11. 8.3.11 Power Good Indication (PG)
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Single Device, Self-Controlled
    3. 9.3 Typical Application
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
        1. 9.3.2.1 Device Selection
        2. 9.3.2.2 Setting Undervoltage and Overvoltage Thresholds
        3. 9.3.2.3 Setting Output Voltage Rise Time (tR)
        4. 9.3.2.4 Setting Power Good Assertion Threshold
        5. 9.3.2.5 Setting Overcurrent Threshold (ILIM)
        6. 9.3.2.6 Setting Overcurrent Blanking Interval (tITIMER)
      3. 9.3.3 Application Curves
    4. 9.4 Active ORing
    5. 9.5 Priority Power MUXing
    6. 9.6 USB PD Port Protection
    7. 9.7 Parallel Operation
  10. 10Power Supply Recommendations
    1. 10.1 Transient Protection
    2. 10.2 Output Short-Circuit Measurements
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Priority Power MUXing

Applications having two energy sources such as PCIe cards, Tablets and Portable battery powered equipment require preference of one source to another. For example, mains power (wall-adapter) has the priority over the internal battery back-up power. These applications demand for switchover from mains power to backup power only when main input voltage falls below a user defined threshold. The TPS25947xx devices provide a simple solution for priority power multiplexing needs.

Figure 9-10 below shows a typical priority power multiplexing implementation using TPS259470x devices. When primary (priority) power source (IN1) is present and within the valid range (not in UV/OV condition), the primary path device path powers the OUT bus irrespective of whether auxiliary supply voltage (VIN2) is greater than, equal to or less than primary supply voltage (VIN1). The device in auxiliary path is held in off condition by forcing its OVLO pin to high using the AUXOFF signal from the primary path device.

After the primary supply voltage falls outside the user-defined valid operating range (UV/OV condition), the primary path device de-asserts the AUXOFF which signals the auxiliary path device to turn on and the system starts operating from the auxiliary supply. During this transition, the auxiliary path device bypasses its dVdt limited startup and performs a fast recovery to start delivering power within tSWOV.

When the primary supply is restored, the primary path device turns on fully at a defined slew rate and then asserts its AUXOFF pin high to turn the auxiliary path device off, allowing a seamless transition from auxiliary to the primary supply with minimal output voltage droop and with no shoot-through current.

A key consideration in power MUXing applications is the minimum voltage the output bus droops to during the switchover from one supply to another. This in turn depends on multiple factors including the output load current (ILOAD), output bus hold-up capacitance (COUT) and switchover time (tSW).

While switching from primary supply (VIN1) to auxiliary supply (VIN2), the minimum bus voltage can be calculated using Equation 19. Here, the switchover time (tSW) is equal to the fast OVLO recovery time (tSWOV) taken by the TPS259470x variants to turn on fully and start delivering current to the load.

Equation 19. GUID-20200925-CA0I-SQNJ-14QF-QB6JTKXK4KMV-low.gif

While switching from auxiliary supply (VIN2) to primary supply (VIN1), the minimum bus voltage can be calculated using Equation 20. Here the maximum switchover time is equal to the RCB recovery time (tSWRCB), depending on whether VIN1 is equal to or lower than VIN2 to start with.

Equation 20. GUID-20200925-CA0I-NS2Z-D3RS-C698KMFJJ5JK-low.gif

The AUXOFF pins of the devices can be used as a digital indication to identify which of the 2 supplies is active and delivering power to the load.

GUID-20200915-CA0I-WMJN-J1BH-PDCHW0NRH3LM-low.gif Figure 9-10 Priority Power MUXing with 2 × TPS259470x - Option 1

This configuration provides the most compact priority power MUXing solution with multiple benefits, including active current limit protection on both channels as well as overvoltage protection on primary channel. It also provides the fastest switchover time from primary to auxiliary, but at the cost of a slightly increased quiescent current on the auxiliary path while primary path is active. Also, it uses the fewest external components, but at the cost of bypassing overvoltage protection on auxiliary channel.

The following waveforms illustrate the TPS259470x performance in a priority power MUXing configuration.

GUID-20200925-CA0I-HSGW-2NRF-CJ7BDN3HBPCS-low.gif Figure 9-11 TPS259470x Power MUX - Switchover from Primary to Auxiliary Supply
GUID-20200925-CA0I-PW09-RMC1-RJX4WRJTFTW6-low.gif Figure 9-12 TPS259470x Power MUX - Switchover from Auxiliary to Primary Supply

There's a possible variation to the above configuration in case overvoltage protection is needed on both channels. This needs an additional signal N-FET to drive the OVLO pin of the auxiliary path device as shown in Figure 9-13 below. The switchover times are similar to the previous configuration.

GUID-20200915-CA0I-ZPJQ-MFNJ-GXXS4486WX4Z-low.gif Figure 9-13 Priority Power MUXing with 2 × TPS259470x - Option 2

Another variation of the previous configuration ensures minimum quiescent current on the auxiliary chanel while primary channel is active, but at the cost of additional N-FET to drive the EN/UVLO pin of auxiliary path device as shown in Figure 9-14 below. At the same time, it has a higher switchover delay from primary to auxiliary supply as compared to the previous configuration.

GUID-20200915-CA0I-ZTDS-BW4V-RS8MPRZZNWWN-low.gif Figure 9-14 Priority Power MUXing with 2 × TPS259470x - Option 3

While switching from a higher supply rail to lower supply rail, the minimum bus voltage can be calculated using Equation 21. Here, the switchover time is equal to the time taken by the device to come out of reverse current blocking state (tSWRCB).

Equation 21. GUID-20200925-CA0I-NS2Z-D3RS-C698KMFJJ5JK-low.gif

While switching from a lower supply rail to higher supply rail, the minimum bus voltage can be calculated using Equation 22. Here, the switchover time (tSW) is the time taken by the device to turn on fully and start delivering current to the load, which is equal to the device turn-on time (tON), which in turn includes the turn-on delay (tD,ON) and rise time (tR) determined by the dVdt capacitor (CdVdt) and bus voltage.

Equation 22. GUID-20200925-CA0I-SQNJ-14QF-QB6JTKXK4KMV-low.gif

All the preceding configurations provide a priority power MUXing solution with active current limit protection response. In case circuit breaker response is prefered, it is possible to implement a solution using TPS259474x devices as shown in Figure 9-15 below. Here, the EN/UVLO signal of the primary path device is used to control the OVLO of the auxiliary path device. This ensures that auxiliary path device is turned on only when the primary supply falls below a user-defined undervoltage (UVLO) threshold. In this configuration, supply overvoltage protection is not available on both channels. The PG pins of the devices can be used as a digital indication to identify which of the 2 supplies is active and delivering power to the load.

GUID-20200915-CA0I-TW1L-KWZN-MKGV5Z669LGQ-low.gif Figure 9-15 Priority power MUXing with 2 × TPS259474x

While switching from one supply rail to the other, the minimum bus voltage can be calculated using Equation 23. Here, the maximum switchover time (tSW) is the time taken by the device to turn on and start delivering power to the load, which is equal to the device turn-on time (tON), which in turn includes the turn-on delay (tD,ON) and rise time (tR) determined by the dVdt capacitor (CdVdt) and bus voltage.

Equation 23. GUID-20200925-CA0I-SQNJ-14QF-QB6JTKXK4KMV-low.gif
Note:
  1. The TPS259472x (OVC variants) are not recommended for use in power MUXing or ORing applications. While the device is in clamping state, if the output is forced to a higher voltage by the other channel, the device can get damaged.
  2. Power MUXing can be done either between two similar rails (such as 12-V Primary and 12-V Aux, 3.3-V Primary and 3.3-V Aux) or between dissimilar rails (such as 12-V Primary and 5-V Aux or vice versa).
  3. For power MUXing cases with skewed voltage combinations, care must be taken to design circuit components on PGTH/EN/OVLO pins for the lower voltage channel devices such that the Absolute maximum ratings on those pins are not exceeded when higher voltage is present on the other channel. Also, the dVdt pin capacitor rating must be chosen based on the highest of the 2 supplies. Refer to Recommended Operating Conditions table for more details.