SLVSIO1B March   2026  – April 2026 UCG28836 , UCG28846

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Detailed Pin Descriptions
      1. 7.3.1  HV - High Voltage Input
      2. 7.3.2  SW - Switch Node
      3. 7.3.3  GND – Ground Return
      4. 7.3.4  FLT - External Overtemperature Fault
      5. 7.3.5  FB ­­– Feedback
      6. 7.3.6  TR - Turns Ratio
      7. 7.3.7  IPS - Peak Current, and Slew Rate
      8. 7.3.8  FCL - Frequency Clamp and Fault Response
      9. 7.3.9  CFX - CCM, Frequency Foldback and X-cap Discharge
      10. 7.3.10 VCC - Input Bias
    4. 7.4 Feature Description
      1. 7.4.1  Self Bias and Auxless Sensing
      2. 7.4.2  Control Law
        1. 7.4.2.1 Valley Switching
        2. 7.4.2.2 Frequency Foldback
        3. 7.4.2.3 Burst Mode
        4. 7.4.2.4 Continuous Conduction Mode (CCM)
      3. 7.4.3  GaN HEMT Switching Capability
      4. 7.4.4  Soft Start
      5. 7.4.5  Frequency Clamp
      6. 7.4.6  Frequency Dithering
      7. 7.4.7  Slew Rate Control
      8. 7.4.8  Transient Peak Power Capability
      9. 7.4.9  X-Cap Discharge
      10. 7.4.10 Fault Protections
        1. 7.4.10.1 Brownout Protection
        2. 7.4.10.2 Short-Circuit Protection
        3. 7.4.10.3 Output Overvoltage Protection
        4. 7.4.10.4 Overpower Protection (OPP, LPS)
        5. 7.4.10.5 Overtemperature Protection
        6. 7.4.10.6 Open FB Protection
        7. 7.4.10.7 Error Codes for Protections
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Bulk Capacitor
        2. 8.2.2.2 Transformer Primary Inductance and Turns Ratio
        3. 8.2.2.3 Output Capacitor
        4. 8.2.2.4 Selection Resistors
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Pin Configuration and Functions

UCG28836 UCG28846 
          UCG2883x/4x 12-Pin QFN (Top View) Figure 5-1 UCG2883x/4x 12-Pin QFN (Top View)
UCG28836 UCG28846 UCG2883x/4x16-Pin SOIC (Top View) Figure 5-2 UCG2883x/4x16-Pin SOIC (Top View)
Table 5-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME QFN NO. SOIC NO.
HV 1 1 P HV startup, AC line input presence detection and X-cap discharge.
SW 2 3 P Drain pin of integrated high-voltage GaN HEMT. This is also the sensing pin for valley switching and protections.
GND 3, 10 5, 12 G Signal ground. Internally connected to power ground.
FLT 4 6 O Fault pin for external overtemperature protection. Connect an NTC from this pin to GND.
FB 5 7 I Feedback signal. Connect this pin to the collector of an optocoupler.
TR 6 8 I Turns ratio setting. A resistor from this pin to GND sets the transformer turns ratio Np/Ns.
IPS 7 9 I Peak current, and switch node slew rate setting pin. A resistor from this pin to GND sets the maximum and minimum primary-side peak current, and switch node voltage slew rate.
FCL 8 10 I Switching frequency clamp and fault behavior setting.
CFX 9 11 I Multifunction pin to enable/disable CCM mode, frequency foldback threshold setting and X-cap discharge enable and disable.
VCC 11 13 P IC bias supply. Connect an external capacitor (at least 10V rated) from this pin to GND. The capacitor value can be between 15µF to 47µF. The capacitor value is determined by the hold up time for missing input line cycles.
GND 12 14, 15, 16 G Power ground. Connect to negative terminal of input bulk capacitor. Add a ground plane with sufficient copper area below the thermal pad for efficient heat conduction to the PCB.
NC 2, 4 No connection for high voltage spacing. Do not connect any trace to these pins.
I = Input, O = Output, I/O = Input or Output, G = Ground, P = Power.