SLVSIP6 June   2026 LMK6L-Q1

ADVMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Environmental Compliance
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Timing Diagrams
    8. 6.8 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1 Device Output Configurations
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Bulk Acoustic Wave (BAW)
      2. 8.3.2 Device Block-Level Description
      3. 8.3.3 Function Pins
        1. 8.3.3.1 FSEL Implementation
      4. 8.3.4 Output Terminations
        1. 8.3.4.1 Replacing a LVPECL oscillator with the LMK6L-Q1
        2. 8.3.4.2 Replacing a HCSL OSC With the LMK6L-Q1
      5. 8.3.5 Wettable Flanks
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
        1. 9.2.3.1 LVDS Phase Noise Curves
        2. 9.2.3.2 HS-LVDS 1.2Vppd Phase Noise Curves
        3. 9.2.3.3 AC-LVPECL 1.2Vppd Phase Noise Curves
        4. 9.2.3.4 LP-HCSL Phase Noise Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 Providing Thermal Reliability
        2. 9.4.1.2 Recommended Solder Reflow Profile
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Mechanical Data

9.2.2 Detailed Design Procedure

When designing with the LMK6L-Q1, the first step is to select the correct configuration based on your requirements. The OPN selected determines the output type, pins 1 and 2 functions, output frequency, and package type. Refer to Section 4 for more details.

The LMK6L-Q1 differential oscillator has AC-LVPECL, LVDS, HS-LVDS, and LP-HCSL output type options. Use the proper AC or DC termination based on the application requirement as shown in Section 8.3.4. The LMK6L-Q1 has output enable or standby options for pins 1 and frequency select (FSEL) option for pin 2. Refer to Section 8.3.3 for more information on each pin, function, and FSEL to determine the desired configuration. The LMK6L-Q1 has integrated LDOs and excellent PSRR performance as shown in Electrical Characteristics. Add a 0.1μF and 1μF to the VDD pin to achieve best performance. Follow Section 9.3 for more power supply pin recommendations and Section 9.4 for best board layout practices when designing with the LMK6L-Q1.