SLVSIV2 August   2026 TPS7A14-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Excellent Transient Response
      2. 6.3.2 Global Undervoltage Lockout (UVLO)
      3. 6.3.3 Enable Input
      4. 6.3.4 Internal Foldback Current Limit
      5. 6.3.5 Active Discharge
      6. 6.3.6 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disable Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1  Recommended Capacitor Types
      2. 7.1.2  Input, Output, and Bias Capacitor Requirements
      3. 7.1.3  Dropout Voltage
      4. 7.1.4  Behavior During Transition From Dropout Into Regulation
      5. 7.1.5  Device Enable Sequencing Requirement
      6. 7.1.6  Load Transient Response
      7. 7.1.7  Undervoltage Lockout Circuit Operation
      8. 7.1.8  Power Dissipation (PD)
      9. 7.1.9  Estimating Junction Temperature
      10. 7.1.10 Recommended Area for Continuous Operation
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Examples
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Evaluation Module
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

5.5 Electrical Characteristics

specified at TJ = –40°C to +150°C, VIN = VOUT(NOM) + 0.15V, VBIAS = greater of 2.2V or VOUT(NOM) + 1.4V, IOUT = 1mA, VEN = 1.0V, CIN = 1μF, COUT = 2.2μF, and CBIAS = 0.1μF (unless otherwise noted); all typical values are at TJ = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOUT  Accuracy over temperature VOUT(NOM) + 0.15V ≤ VIN ≤ 2.2V,
Greater of 2.2V or VOUT(NOM) + 1.4V ≤ VBIAS ≤ 5.5V,
1mA ≤ IOUT ≤ 1A		 TJ = –40°C to +150°C –2.7 1 %
TJ = –40°C to +125°C –1.6 1
ΔVOUT / ΔVIN VIN line regulation  VOUT(NOM) + 0.15V ≤ VIN ≤ 2.2V –3 3 mV
ΔVOUT / ΔVBIAS VBIAS line regulation VOUT(NOM) + 1.4V ≤ VBIAS ≤ 5.5V –4 ±0.15 4 mV
ΔVOUT / ΔIOUT Load regulation 1mA ≤ IOUT ≤ 1A 0.2 %/A
IQ(BIAS) Bias pin current IOUT = 0mA 47 µA
IQ(BIAS) Bias pin current IOUT = 1A 17 mA
IQ(IN) Input pin current(1) IOUT = 0mA 135 µA
IGND Ground pin current IOUT = 1A 480 660 µA
ISHDN(BIAS) VBIAS  shutdown current VIN = 2.2V, VBIAS = 5.5V, VEN ≤ 0.2V 0.3 9 µA
ISHDN(IN) VIN  shutdown current VIN = 1.8V, VBIAS = 5.5V, VEN ≤ 0.2V 1 55 µA
ICL Output current limit VOUT = 0.95 × VOUT(NOM) 1.035 1.6 2.45 A
ISC Short circuit current limit VOUT = 0V 600 mA
VDO(IN) VIN dropout voltage(2) TJ = –40°C to + 150°C VIN = 0.95 × VOUT(NOM),
IOUT = 1A		 140 mV
VDO(IN) VIN dropout voltage(2) TJ = –40°C to + 150°C VIN = 0.95 × VOUT(NOM),
IOUT = 500mA		 102 mV
VDO(BIAS) VBIAS dropout voltage(2) VBIAS = greater of 1.7V or VOUT(nom) + 0.6V,
VSENSE = 0.95 × VOUT(nom), IOUT = 1A		 1.2 V
VIN  PSRR VIN  power-supply rejection ratio f = 100Hz IOUT = 3mA 90 dB
IOUT = 500mA 80
IOUT = 1A 80
f = 1kHz IOUT = 3mA 90
IOUT = 500mA 80
IOUT = 1A 70
f = 10kHz IOUT = 3mA 70
IOUT = 500mA 60
IOUT = 1A 50
f = 100kHz IOUT = 3mA 60
IOUT = 500mA 43
IOUT = 1A 33
f = 1MHz IOUT = 3mA 60
IOUT = 500mA 24
IOUT = 1A 15
f = 1MHz,
VIN = VOUT + 150mV		 IOUT = 3mA 69
IOUT = 500mA 42
IOUT = 1A 33
VBIAS PSRR VBIAS power-supply rejection ratio IOUT = 500mA f = 1kHz 65 dB
f = 100kHz 45
f = 1MHz 25
Vn Output voltage noise Bandwidth = 10Hz to 100kHz,
VOUT = 0.8V, 5mA ≤ IOUT ≤ 1A		 7.2 µVRMS
VUVLO(BIAS) Bias supply UVLO VBIAS rising 1.15 1.42 1.7 V
VBIAS falling 1.0 1.3 1.63
VUVLO_HYST(BIAS) Bias supply hysteresis VBIAS hysteresis 100 mV
VUVLO(IN) Input supply UVLO  VIN rising 584 603 623 mV
VIN falling 530 552 566
VUVLO_HYST(IN) Input supply hysteresis VIN hysteresis 50 mV
tSTR Start-up time(3)
 		 186 µs
VEN(HI) EN pin logic high voltage(4) 0.6 6 V
VEN(LOW) EN pin logic low voltage(4) 0 0.24 V
IEN EN pin current EN = 5.5V -25 10 25 nA
RPULLDOWN Pulldown resistor VIN = 0.9V, VOUT(nom) = 0.8V, VBIAS = 1V,
VEN = 0V, P version only		 36 Ω
TSD Thermal shutdown temperature Shutdown, temperature rising 165 °C
Reset, temperature falling 140
(1) This is the current flowing from VIN to GND.
(2) Dropout is not measured for VOUT < 0.6V. VBIAS dropout applies only for VBIAS of 2.2V or greater.
(3) Startup time = time from EN assertion to 0.95 × VOUT(NOM).
(4) An input voltage within the minimum to maximum range is interpreted as the correct logic level.