SLVSJH0 May   2026 TPS25752A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
      1. 5.1.1 TPS25752A - Absolute Maximum Ratings
      2. 5.1.2 TPS25752A - Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  TPS25752A - Recommended Operating Conditions
    4. 5.4  Recommended Capacitance
    5. 5.5  Thermal Information
    6. 5.6  Power Supply Characteristics
    7. 5.7  Power Consumption
    8. 5.8  PP_5V Power Switch Characteristics
    9. 5.9  PP_EXT Characteristics - TPS25752A
    10. 5.10 Power Path Supervisory
    11. 5.11 CC Cable Detection Parameters
    12. 5.12 CC VCONN Parameters
    13. 5.13 CC PHY Parameters
    14. 5.14 Thermal Shutdown Characteristics
    15. 5.15 ADC Characteristics
    16. 5.16 Input/Output (I/O) Characteristics
    17. 5.17 BC1.2 Characteristics
    18. 5.18 I2C Requirements and Characteristics
    19. 5.19 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  USB-PD Physical Layer
        1. 7.3.1.1 USB-PD Encoding and Signaling
        2. 7.3.1.2 USB-PD Bi-Phase Marked Coding
        3. 7.3.1.3 USB-PD Transmit (TX) and Receive (Rx) Masks
        4. 7.3.1.4 USB-PD BMC Transmitter
        5. 7.3.1.5 USB-PD BMC Receiver
        6. 7.3.1.6 Squelch Receiver
      2. 7.3.2  Power Management
        1. 7.3.2.1 Power-On And Supervisory Functions
      3. 7.3.3  Power Paths
        1. 7.3.3.1 Internal Sourcing Power Paths
          1. 7.3.3.1.1 PP_5V Current Clamping
          2. 7.3.3.1.2 PP_5V Local Overtemperature Shut Down (OTSD)
          3. 7.3.3.1.3 PP_5V OVP
          4. 7.3.3.1.4 PP_5V UVLO
          5. 7.3.3.1.5 PP_5V Reverse Current Protection
          6. 7.3.3.1.6 PP_CABLE Current Clamp
          7. 7.3.3.1.7 PP_CABLE Local Overtemperature Shut Down (OTSD)
          8. 7.3.3.1.8 PP_CABLE UVLO
        2. 7.3.3.2 External Powerpath Control PP_EXT
          1. 7.3.3.2.1 Overvoltage Protection (OVP)
          2. 7.3.3.2.2 VBUS UVLO
          3. 7.3.3.2.3 Discharging VBUS to Safe Voltage
      4. 7.3.4  Cable Plug and Orientation Detection
        1. 7.3.4.1 Configured as a Source
      5. 7.3.5  Overvoltage Protection (CC1, CC2)
      6. 7.3.6  Default Behavior Configuration (ADCIN1, ADCIN2)
      7. 7.3.7  ADC
      8. 7.3.8  Liquid Detection
      9. 7.3.9  BC 1.2 (USB_P, USB_N)
      10. 7.3.10 Digital Interfaces
        1. 7.3.10.1 General GPIO
        2. 7.3.10.2 I2C Interface
          1. 7.3.10.2.1 I2C Interface Description
            1. 7.3.10.2.1.1 I2C Clock Stretching
            2. 7.3.10.2.1.2 I2C Address Setting
            3. 7.3.10.2.1.3 Unique Address Interface
            4. 7.3.10.2.1.4 Pin Strapping to Configure Default Behavior
      11. 7.3.11 Digital Core
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power States
      2. 7.4.2 Schottky for Current Surge Protection
      3. 7.4.3 Thermal Shutdown
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Liquid Detection Design Requirements
        2. 8.2.1.2 BC1.2 Application Design Requirements
        3. 8.2.1.3 USB Data Support Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Liquid Detection
        2. 8.2.2.2 BC1.2 Application
        3. 8.2.2.3 USB Data Support
      3. 8.2.3 Application Curves
        1. 8.2.3.1 Liquid Detection Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 3.3V Power
        1. 8.3.1.1 VIN_3V3 Input Switch
      2. 8.3.2 1.5V Power
      3. 8.3.3 Recommended Supply Load Capacitance
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Recommended Via Size
        2. 8.4.1.2 Minimum Trace Widths
      2. 8.4.2 Layout Example
        1. 8.4.2.1 Schematic
        2. 8.4.2.2 PCB Plots
          1. 8.4.2.2.1 Component Placement
          2. 8.4.2.2.2 PP5V
          3. 8.4.2.2.3 PP_EXT
          4. 8.4.2.2.4 VBUS
          5. 8.4.2.2.5 I/O
          6. 8.4.2.2.6 PPEXT Gate Driver
          7. 8.4.2.2.7 GND
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

CC PHY Parameters

Operating under these conditions unless otherwise noted: and ( 3V ≤ VVIN_3V3 ≤ 3.6V or VVBUS ≥ 3.9V )
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
Transmitter
VTXHITransmit high voltage on CCyStandard External load 1.051.1251.2V
VTXLOTransmit low voltage on CCyStandard External load –7575mV
ZDRIVERTransmit output impedance while driving the CC line using CCymeasured at 750kHz335475Ω
tRiseRise time. 10% to 90% amplitude points on CCy, minimum is under an unloaded condition. Maximum set by TX maskCCCy = 520pF300ns
tFallFall time. 90% to 10% amplitude points on CCy, minimum is under an unloaded condition. Maximum set by TX maskCCCy = 520pF300ns
VPHY_OVPOVP detection threshold for USB PD PHY0V ≤ VVIN_3V3 ≤ 3.6V, 0V ≤ VPP5V ≤ 5.5V, VVBUS ≥ 4V. Initially VCC1 ≤ 5.5V and VCC2 ≤ 5.5V, then VCCx rises5.58.5V
Receiver
ZBMCRXReceiver input impedance on CCyDoes not include pullup or pulldown resistance from cable detect. Transmitter is Hi-Z1MΩ
CCCReceiver capacitance on CCy1Capacitance looking into the CC pin when in receiver mode120pF
VRX_SRC_R Rising threshold on CCy for receiver comparator Source mode (rising) 784 825 866 mV
VRX_SRC_F Falling threshold on CCy for receiver comparator Source mode (falling) 523 550 578 mV
CCC includes only the internal capacitance on a CCy pin when the pin is configured to be receiving BMC data. External capacitance is needed to meet the required minimum capacitance per the USB-PD Specifications (cReceiver). Therefore, TI recommends adding CCCy externally.