SLVSJH0 May   2026 TPS25752A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
      1. 5.1.1 TPS25752A - Absolute Maximum Ratings
      2. 5.1.2 TPS25752A - Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  TPS25752A - Recommended Operating Conditions
    4. 5.4  Recommended Capacitance
    5. 5.5  Thermal Information
    6. 5.6  Power Supply Characteristics
    7. 5.7  Power Consumption
    8. 5.8  PP_5V Power Switch Characteristics
    9. 5.9  PP_EXT Characteristics - TPS25752A
    10. 5.10 Power Path Supervisory
    11. 5.11 CC Cable Detection Parameters
    12. 5.12 CC VCONN Parameters
    13. 5.13 CC PHY Parameters
    14. 5.14 Thermal Shutdown Characteristics
    15. 5.15 ADC Characteristics
    16. 5.16 Input/Output (I/O) Characteristics
    17. 5.17 BC1.2 Characteristics
    18. 5.18 I2C Requirements and Characteristics
    19. 5.19 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  USB-PD Physical Layer
        1. 7.3.1.1 USB-PD Encoding and Signaling
        2. 7.3.1.2 USB-PD Bi-Phase Marked Coding
        3. 7.3.1.3 USB-PD Transmit (TX) and Receive (Rx) Masks
        4. 7.3.1.4 USB-PD BMC Transmitter
        5. 7.3.1.5 USB-PD BMC Receiver
        6. 7.3.1.6 Squelch Receiver
      2. 7.3.2  Power Management
        1. 7.3.2.1 Power-On And Supervisory Functions
      3. 7.3.3  Power Paths
        1. 7.3.3.1 Internal Sourcing Power Paths
          1. 7.3.3.1.1 PP_5V Current Clamping
          2. 7.3.3.1.2 PP_5V Local Overtemperature Shut Down (OTSD)
          3. 7.3.3.1.3 PP_5V OVP
          4. 7.3.3.1.4 PP_5V UVLO
          5. 7.3.3.1.5 PP_5V Reverse Current Protection
          6. 7.3.3.1.6 PP_CABLE Current Clamp
          7. 7.3.3.1.7 PP_CABLE Local Overtemperature Shut Down (OTSD)
          8. 7.3.3.1.8 PP_CABLE UVLO
        2. 7.3.3.2 External Powerpath Control PP_EXT
          1. 7.3.3.2.1 Overvoltage Protection (OVP)
          2. 7.3.3.2.2 VBUS UVLO
          3. 7.3.3.2.3 Discharging VBUS to Safe Voltage
      4. 7.3.4  Cable Plug and Orientation Detection
        1. 7.3.4.1 Configured as a Source
      5. 7.3.5  Overvoltage Protection (CC1, CC2)
      6. 7.3.6  Default Behavior Configuration (ADCIN1, ADCIN2)
      7. 7.3.7  ADC
      8. 7.3.8  Liquid Detection
      9. 7.3.9  BC 1.2 (USB_P, USB_N)
      10. 7.3.10 Digital Interfaces
        1. 7.3.10.1 General GPIO
        2. 7.3.10.2 I2C Interface
          1. 7.3.10.2.1 I2C Interface Description
            1. 7.3.10.2.1.1 I2C Clock Stretching
            2. 7.3.10.2.1.2 I2C Address Setting
            3. 7.3.10.2.1.3 Unique Address Interface
            4. 7.3.10.2.1.4 Pin Strapping to Configure Default Behavior
      11. 7.3.11 Digital Core
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power States
      2. 7.4.2 Schottky for Current Surge Protection
      3. 7.4.3 Thermal Shutdown
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Liquid Detection Design Requirements
        2. 8.2.1.2 BC1.2 Application Design Requirements
        3. 8.2.1.3 USB Data Support Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Liquid Detection
        2. 8.2.2.2 BC1.2 Application
        3. 8.2.2.3 USB Data Support
      3. 8.2.3 Application Curves
        1. 8.2.3.1 Liquid Detection Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 3.3V Power
        1. 8.3.1.1 VIN_3V3 Input Switch
      2. 8.3.2 1.5V Power
      3. 8.3.3 Recommended Supply Load Capacitance
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Recommended Via Size
        2. 8.4.1.2 Minimum Trace Widths
      2. 8.4.2 Layout Example
        1. 8.4.2.1 Schematic
        2. 8.4.2.2 PCB Plots
          1. 8.4.2.2.1 Component Placement
          2. 8.4.2.2.2 PP5V
          3. 8.4.2.2.3 PP_EXT
          4. 8.4.2.2.4 VBUS
          5. 8.4.2.2.5 I/O
          6. 8.4.2.2.6 PPEXT Gate Driver
          7. 8.4.2.2.7 GND
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

PP_5V Power Switch Characteristics

Operating under these conditions unless otherwise noted: 3.0V ≤ VLDO_3V3 ≤ 3.6 V
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
RPP_5VResistance from PP5V to VBUSILOAD = 3A, TJ = 25°C3638mΩ
RPP_5VResistance from PP5V to VBUSILOAD = 3 A,TJ = 125°C3653mΩ
IPP5V_REVVBUS to PP5V leakage currentVPP5V = 0V, VVBUS = 5.5V, PP_5V disabled, TJ ≤ 85°C, measure IPP5V5µA
IPP5V_FWDPP5V to VBUS leakage currentVPP5V = 5.5V, VVBUS = 0V, PP_5V disabled, TJ ≤ 85°C, measure IVBUS15µA
ILIM5V Current limit setting Configure to setting 0 1.15 1.36 A
ILIM5V Current limit setting Configure to setting 1 1.61 1.90 A
ILIM5VCurrent limit settingConfigure to setting 22.32.70A
ILIM5V Current limit setting Configure to setting 3 3.04 3.58 A
ILIM5VCurrent limit settingConfigure to setting 43.223.78A
IVBUSPP5V to VBUS current sense accuracy3.64A ≥ IVBUS ≥ 1 A3.053.53.75A/V
VPP_5V_RCPRCP clears and PP_5V starts turning on when VVBUS – VPP5V < VPP_5V_RCP. Measure VVBUS – VPP5V1020mV
tiOS_PP_5VResponse time to VBUS short circuitVBUS to GND through 10mΩ, CVBUS = 01.15µs
tPP_5V_ovpResponse time to VVBUS > VOVP4RCPEnable PP_5V, IRpDef being drawn from PP5V, configure VOVP4RCP to setting 2, ramp VVBUS from 4V to 20V at 100V/ms, CPP5V = 2.5 µF, measure time from OVP detection until reverse current < 100mA4.5µs
tPP_5V_uvloResponse time to VPP5V < VPP5V_UVLO, PP_VBUS is deemed off when VVBUS < 0.8VRL = 100Ω, no external capacitance on VBUS4µs
tPP_5V_rcpResponse time to VPP5V < VVBUS + VPP_5V_RCPVPP5V = 5.5V, IRpDef being drawn from PP5V, enable PP_5V, configure VOVP4RCP to setting 2, ramp VVBUS from 4V to 21.5V at 10 V/µs, measure VPP5V. CPP5V = 104µF, CVBUS=10µF, measure time from RCP detection until reverse current < 100mA0.7µs
tILIMCurrent clamping deglitch time5.1ms
tONFrom enable signal to VBUS at 90% of final value RL = 100Ω, VPP5V = 5V, CL = 02.33.34.3ms
tOFFFrom disable signal to VBUS at 10% of final valueRL = 100Ω, VPP5V = 5V, CL = 00.300.450.6ms
tRISEVBUS from 10% to 90% of final value  RL = 100Ω, VPP5V = 5V, CL = 01.21.72.2ms
tFALLVBUS from 90% to 10% of initial value RL = 100Ω, VPP5V = 5V, CL = 00.060.10.14ms