SLVSJW2 September   2025 SN74ACT165-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4.   4
  5. 3 Description
  6. 4 Pin Configuration and Functions
  7. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Characteristics
    7.     14
    8. 5.7 Switching Characteristics
    9. 5.8 Typical Characteristics
  8. 6 Parameter Measurement Information
  9. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced CMOS Push-Pull Outputs
      2. 7.3.2 TTL-Compatible CMOS Inputs
      3. 7.3.3 Wettable Flanks
      4. 7.3.4 Clamp Diode Structure
    4. 7.4 Device Functional Modes
  10. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Power Considerations
        2. 8.2.1.2 Input Considerations
        3. 8.2.1.3 Output Considerations
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  11. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  12. 10Revision History
  13. 11Mechanical, Packaging, and Orderable Information

4 Pin Configuration and Functions

SN74ACT165-Q1 SN74ACT165-Q1 BQB Package (Top View)Figure 4-1 SN74ACT165-Q1 BQB Package (Top View)
SN74ACT165-Q1 SN74ACT165-Q1 PW Package (Top View)Figure 4-2 SN74ACT165-Q1 PW Package
(Top View)
Table 4-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
SH/LD 1 I Enable shifting when input is high, load data when input is low
CLK 2 I Clock, rising edge triggered
E 3 I Parallel input E
F 4 I Parallel input F
G 5 I Parallel input G
H 6 I Parallel input H
QH 7 O Inverted serial output
GND 8 G Ground
QH 9 O Serial output
SER 10 I Serial input
A 11 I Parallel input A
B 12 I Parallel input B
C 13 I Parallel input C
D 14 I Parallel input D
CLK INH 15 I Clock inhibit input
VCC 16 P Positive supply
Thermal Pad(2) — The thermal pad can be connect to GND or left floating. Do not connect to any other signal or supply.
(1) Signal Types: I = Input, O = Output, G = Ground, P = Power.
(2) BQB package only.