SLVSMK3 June   2026

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 Power Requirements
    2. 2.2 Headers and SMP Connectors Information
    3. 2.3 Test Points
  7. 3Hardware Design Files
    1. 3.1 Schematics
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials (BOM)
  8. 4Additional Information
    1. 4.1 Trademarks

1.4 Device Information

The TMUXHS5212 is a passive differential 2-channel 2:1 high-speed multiplexer. The logic control is done through GPIO with the active low PD pin enabling channel selection, while the SEL pins allow for toggling between the channels B and C.

The TMUXHS5212 is designed to pass PCIe Gen 5 signals with a supply operation of 1.65V to 1.95V.