SLVSMK3 June   2026

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 Power Requirements
    2. 2.2 Headers and SMP Connectors Information
    3. 2.3 Test Points
  7. 3Hardware Design Files
    1. 3.1 Schematics
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials (BOM)
  8. 4Additional Information
    1. 4.1 Trademarks

Headers and SMP Connectors Information

The TMUXHS5212-EVM has two 3-pin headers and sixteen SMP connectors to set up the logic control and pass high speed signals. The EVM also allows for signal calibration and a comparison in signal integrity performance between the device and a simple trace. The following is a description of each header and SMP connector.

  1. PD J Header

    Header PD J connects the PD pin to the voltage supply or to ground via a jumper. Figure 2-1 shows header PD J.

    1. To connect to VDD, short the J2-3 location on the header. The VDD banana jack plugin is now pulling up the PD pin.
    2. To connect to ground, short the J2-1 location on the header. The GND banana jack plugin is now pulling down the PD pin and activating the logic control of the device.
  2. SEL J Header

    Header SEL J connects the SEL pin to the voltage supply or to ground via a jumper. Figure 2-1 shows header SEL J.

    1. To connect to VDD, short the J2-1 location on the header. The VDD banana jack plugin is now pulling up the SEL pin connecting channel A to channel C.
    2. To connect to ground, short the J2-3 location on the header. The GND banana jack plugin is now pulling down the SEL pin connecting channel A to channel B.
  3. Calibration Traces

    The SMP connectors are placed in a way to simulate a perfect differential pair. They can be used to compare high speed signal performance between the device and an ideal condition. This is for customer evaluation of the TMUXHS5212, to see its effect on signal performance and attenuation.

TMUXHS5212-EVM Header PD J: J-1(GND),
                    J-2(Connection to device PD), J-3 (VDD) Figure 2-1 Header PD J: J-1(GND), J-2(Connection to device PD), J-3 (VDD)
TMUXHS5212-EVM Header SEL J: J-1(VDD),
                    J-2(Connection to device SEL), J-3 (GND) Figure 2-2 Header SEL J: J-1(VDD), J-2(Connection to device SEL), J-3 (GND)
TMUXHS5212-EVM Calibration Traces Figure 2-3 Calibration Traces