SLVUBE6C November   2018  – July 2021 TPS56339

 

  1.   Trademarks
  2. 1Introduction
  3. 2Performance Specification Summary
  4. 3Modifications
    1. 3.1 Output Voltage Set Point
    2. 3.2 Adjustable UVLO
  5. 4EVM Photos
  6. 5Test Setup and Results
    1. 5.1  Input/Output Connections
    2. 5.2  Start-Up Procedure
    3. 5.3  Efficiency
    4. 5.4  Output Voltage Load Regulation
    5. 5.5  Output Voltage Line Regulation
    6. 5.6  Load Transients
    7. 5.7  Voltage Ripple
    8. 5.8  Powering Up
    9. 5.9  Powering Down
    10. 5.10 Output Short Protection and Recovery
    11. 5.11 Thermal Performance
  7. 6Board Layout
    1. 6.1 Layout
  8. 7Schematic and List of Materials
    1. 7.1 Schematic
    2. 7.2 List of Materials
  9. 8Revision History

5.1 Input/Output Connections

The TPS56339EVM is provided with input/output connectors and test points as shown in Table 5-1. A power supply capable of supplying 3 A must be connected to J1 through a pair of 20-AWG wires. The load must be connected to J3 through a pair of 20-AWG wires. The maximum load current capability must be at least 3 A to use the full capability of this EVM. Wire lengths must be minimized to reduce losses in the wires. Test-point TP1 provides a place to monitor the VIN input voltages with TP2 providing a convenient ground reference. TP8 is used to monitor the output voltage with TP9 as the ground reference.

Table 5-1 EVM Connectors and Test Points
Reference DesignatorFunction
J1VIN (see Table 1-1 for VIN range)
J3VOUT, 5 V at 3 A maximum
J23-pin header for enable. Connect Pin2 to Pin1 to disable, Connect Pin2 to Pin3 to enable by resistor network, open to enable by EN floating.
TP1VIN test point at VIN connector
TP2GND test point at VIN connector
TP3GND test point
TP4EN test point
TP5SW test point
TP6Boot test point
TP7Test point between voltage divider network and output. Used for loop response measurements.
TP8Output voltage test point at VOUT connector
TP9GND test point at VOUT connector