SLVUCQ6 july   2023 TPS7H2211-SEP

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
      1. 1.3.1 Alternate Board Configurations
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 EVM Connectors and Test Points
  7. 3Implementation Results
    1. 3.1 Default Configuration Results
    2. 3.2 Parallel Configuration Results
  8. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 Board Layout
    3. 4.3 Bill of Materials (BOM)
  9. 5Related Documentation

2.1 EVM Connectors and Test Points

GUID-20230628-SS0I-RTB4-VZKB-GLBC56FR798H-low.pngFigure 2-1 TPS7H2211EVM 3D Rendering (Top)
Table 2-1 Summary of Connectors and Test Points
Reference DesignatorFunction
J3, J5 (pins 3 & 4)

VIN1

Input Voltage and Current for U1

J8, J5 (pins 1 & 2)

GND

J12, J14 (pins 1 & 2)

VIN2

Input Voltage and Current for U2
J17, J14 (pins 3 & 4)

GND

J4, J13, J6 (pins 3 & 4), J15 (pins 3 & 4)

VOUT

Output Voltage and Current for Board

J9, J18, J6 (pins 1 & 2), J15 (pins 1 & 2)

GND

J1, TP1, TP2

VIN1

Test Point

J10, TP12, TP13

VIN2

J2, J11, TP3, TP4, TP14, TP15

VOUT

TP5, TP6, TP10, TP11, TP16, TP17, TP21, TP22

GND

TP8

SS1

TP19

SS2

TP7

EN1

TP18

EN2

TP9

OVP1

TP20

OVP2

J7

VIN1-EN1-GND

Shunt for mode selection

J16

VIN2-EN2-GND