SLVUD02A April 2025 – May 2026
The simplified schematic below assumes TPS7H30x4 (push-pull output variants). For the TPS7H31x4 (open-drain variants), the PULL_UPx pins will instead be GND or VLDO, and the 6 outputs will each be tied to the PULL_UPx rails with external 10k pull-up resistors.
Specification | Value | Description |
|---|---|---|
Input Voltage VIN | 12V | Falls within the recommended device input voltage range of 3V to 14V. |
Turn On Threshold | 10.3V | VIN rising/falling value that turns the device ON/OFF. Set by: R20 = 10 kΩ R21 = 620 Ω |
Turn Off Threshold | 8.5V | |
PULL_UP1 Voltage | 1.8V | Voltage used by all RESETb outputs. Falls within the recommended device PULL_UPx voltage range of 1.6V to 7V. |
PULL_UP2 Voltage | 1.8V | Voltage used by WDOb and PWRGD outputs. Falls within the recommended device PULL_UPx voltage range of 1.6V to 7V. |
VOUT1 VRISE Threshold | 2.20V (88 % of 2.5V) | Rising and falling voltage thresholds where the monitored VOUT rail is considered IN or OUT of regulation, respectively. Set by: R22 = 5.17 kΩ (or R22=5.10kΩ) R25 = 1.91 kΩ |
VOUT1 VFALL Threshold | 2.08V (83 % of 2.5V) | |
VOUT2 VRISE Threshold | 3.46 V (105 % of 3.3V) | Rising and falling voltage thresholds where the monitored VOUT rail is considered IN or OUT of regulation, respectively. Set by: R23 = 5.49 kΩ R26 = 1.15 kΩ |
VOUT2 VFALL Threshold | 3.33 V (101 % of 3.3V) | |
VOUT3 VRISE Threshold | 0.79 V (99 % of 0.8V) | Rising and falling voltage thresholds where the monitored VOUT rail is considered IN or OUT of regulation, respectively. Set by: R28 = 1.33 kΩ R31 = 4.12 kΩ |
VOUT3 VFALL Threshold | 0.76 V (95 % of 0.8V) | |
VOUT4 VRISE Threshold | 1.99 V (111 % of 1.8V) | Rising and falling voltage thresholds where the monitored VOUT rail is considered IN or OUT of regulation, respectively. Set by: R29 = 3.74 kΩ R32 = 1.62 kΩ |
VOUT4 VFALL Threshold | 1.90 V (106 % of 1.8V) | |
RESETb Delay Time tDLY_TMR | 12.5 ms | Programmable time delay between when the condition for a RESETb signal to go HIGH is met and when the signal actually transitions. Set by: R15 = 619 kΩ J14 shunted |
Watchdog Timer tWD_TMR | 1 s | Programmable timer that sets the amount of time allowed netween rising edges sensed at the WDI pin in order for WDOb to remain HIGH. If the timer expires, the WDOb output will go low until the next sensed rising edge at WDI. Set by: R18 = 118 kΩ J17 shunted |