SLVUD02A April   2025  – May 2026

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
      1. 1.3.1 Negative Rail Sensing
      2. 1.3.2 Configuration for Push-Pull vs Open-Drain
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 Power Requirements
    2. 2.2 Important Usage Notes
    3. 2.3 Connector Descriptions
  7. 3Implementation Results
    1. 3.1 Default Configuration Results
    2. 3.2 Enable and Disable
    3. 3.3 Undervoltage and Overvoltage Monitoring (MODE=0)
    4. 3.4 Window and Overvoltage Monitoring (MODE=1)
    5. 3.5 WDOb
  8. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 Bill of Materials (BOM)
    3. 4.3 PCB Layouts
  9. 5Compliance Information
    1. 5.1 Compliance and Certifications
  10. 6Related Documentation
  11. 7Revision History

1.3.2 Configuration for Push-Pull vs Open-Drain

The TPS7H3xx4EVM-CVAL boards are by default configured for the specific IC they feature. These configurations are minor BOM differences, which are listed below and also highlighted in the EVM schematic. Users can re-configure the boards for testing the other IC variants if desired. The board layouts are the same.

  1. Pin configuration

    • TPS7H30x4-SP (push-pull variants) use 0-ohm resistors to connect the PULL_UPx pins (pin 17 and pin 18) to the PULL_UPx rails

    • TPS7H31x4-SP (open-drain variants) use 0-ohm resistors to connect pin 17 and pin 18 to GND and VLDO as required by the datasheet

  2. External pull-up resistors

    • TPS7H30x4-SP (push-pull variants) depopulate the 6 external pull-up resistors used for the RESETxb, PWRGD, and WDOb outputs

    • TPS7H31x4-SP (open-drain variants) populate 6 external pull-up resistors used for the RESETxb, PWRGD, and WDOb outputs. The board uses 10k resistors as a default.