SLVUDA9B October   2025  – October 2026

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specifications
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 I/O Information
    2. 2.2 Jumper Information
    3. 2.3 Equipment
    4. 2.4 Hardware Setup
  9. 3Software
    1. 3.1 Software Setup
    2. 3.2 Test Procedure
      1. 3.2.1 Initial Power Up
      2. 3.2.2 I2C Register Setup
      3. 3.2.3 Forward/Charge/Sink Mode Verification
      4. 3.2.4 Reverse/OTG/Source Mode Verification
      5. 3.2.5 Helpful Tips
  10. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layout
      1. 4.2.1 PCB Layout Guidelines
    3. 4.3 Bill of Materials (BOM)
  11. 5Additional Information
    1.     Trademarks
  12. 6Revision History

6 Revision History

Changes from Revision A (July 2026) to Revision B (October 2026)

  • Updated description section Go
  • Rearranged steps and corrected informationGo
  • Moved sentence and corrected informationGo
  • Added Note 1Go
  • Updated J5,J10 connections and routingGo
  • Updated R6, R8, R18, R27, R35, J5, J10Go

Changes from Revision * (October 2025) to Revision A (July 2026)

  • Updated description section Go
  • Updated hardware imageGo
  • Changed JP23 functionality and added JP24Go
  • Updated figure to REVB PCBGo
  • Summarized register setup into a tableGo
  • Updated hardware design files from REVE-2 to final REVBGo
  • Updated R6, R8, R18, R27, R35 values and J5, J10 connectionsGo
DATE REVISION NOTES
October 2025 * Initial Release

Changes from , to , (from Revision () to Revision ())