SLVUDK8 October   2026 DLP3940S-Q1

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specifications
      1. 1.3.1 Electrical Specifications
      2. 1.3.2 Component Temperature Ratings - DLP3940SQ1EVM
      3. 1.3.3 SPI and I2C Timing
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 DLP3940SQ1EVM Block Diagram
    2. 2.2 Controller PCB
    3. 2.3 RGB LED Driver PCB - DLP3940SQ1
    4. 2.4 Optical Engine Requirements
  8. 3Software
    1. 3.1 Software Installation
    2. 3.2 Quick Start
      1. 3.2.1 Kit Assembly Instructions
      2. 3.2.2 Powering-Up EVM
      3. 3.2.3 Steps to Reprogram the Onboard Flash Memory
    3. 3.3 Connecting EVM to the DLPC230-Q1 Control Program via SPI
    4. 3.4 Connecting EVM to the DLPC230-Q1 Control Program via USB
  9. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layouts
    3. 4.3 Bill of Materials (BOM)
  10. 5Additional Information
    1. 5.1 Trademarks

2.2 Controller PCB

The controller PCB shown in Figure 2-2 includes the DLPC231-Q1 DMD Controller and the TPS99002-Q1. The controller PCB supports video inputs from either an HDMI or OpenLDI interface and provides the formatting and control to display the video on the DLP3940S-Q1 DMD.

The controller board has a SPI port for users who wish to use a Cheetah™ SPI host adapter. However, the Cheetah host adapter must be bought separately from the EVM. This port allows for high-speed SPI communication between the controller board and host. An optional second SPI port is provided for monitoring the TPS990002S-Q1.

The controller board has an additional I2C port. The provided I2C cable includes PROJ_ON, HOLD_BOOT, and HOST_IRQ, signals readily available to allow indirect control and monitoring of the EVM.

If direct SPI or I2C is not preferred, there is an on-board Cypress chip that allows for USB to SPI or USB to I2C communication.

Each of these communication ports allow the user to communicate to the controller from the external world via a PC or the Automotive Control Program reference software, which speeds up the development of supported automotive EVMs. Some features include flashing new firmware onto the controller, changing test pattern generator (TPG) images, changing sources (such as TPG to HDMI), or obtaining controller or PMIC (TPS99002-Q1) diagnostics.

The controller board has an external photodiode input that is used to control white point and brightness over a wide dimming range. An optional second photodiode input is also provided for the DLP3940SQ1EVM kit.

The LED thermistor on the board can be used to measure the temperatures of the red, green, and blue LEDs when using the DLP3940SQ1EVM.

The headlight interface port helps control the LED brightness and PWM output from the DLPC231S-Q1 DMD controller.

On the opposite side of the EVM is a HUD interface port, which helps control and monitor an illumination design such as the RGB LED driver provided in the kit.

DLP3940SQ1EVM DLPC231SQ1EVM Controller PCBFigure 2-2 DLPC231SQ1EVM Controller PCB

The controller PCB contains the ports listed in Table 2-1. Indicator LEDs are listed in Table 2-2.

Table 2-1 Controller PCB Ports
SCHEMATIC REFERENCEFUNCTION
J1 DMD flex cable interface
J2 Headlight driver interface
J3 TI Internal Port
J4 HDMI input
J5 FPGA SPI flash interface
J6 LED Thermistor
J7 Formatter power input
J8 OpenLDI input
J9 Photodiode 1
J10 FPGA 1.8 V I2C SCL pull-up select
J11 FPGA 1.8 V I2C SDA pull-up select
J12 FPGA 3.3 V level translator external I2C enable
J13 Photodiode 2
J14 Host USB input (USB-to-SPI or USB-to-I2C)
J15 External ASIC-FPGA I2C interface
J16 HOST 1/2 SPI CSZ select header
J17 HOST 1/2 SPI CLK select header
J18 Host 1/2 SPI_PICO select header(1)
J19 Host 1/2 SPI_POCI select header(1)
J20 FPGA Test MUX
J21 Fan PWM
J22 Devasys Connector (TI Internal Use)
J23 Cheetah™ HOST_SPI connector
J24 Cheetah™ PMIC_SPI connector
J25 FPGA JTAG interface
J26 FPGA M[2:0] pull-up/down select
J27 HOST_I2C interface
J500 HUD driver interface
(1) PICO and POCI are used for Peripheral In, Controller Out and Peripheral Out, Controller In, respectively.
Table 2-2 Controller LED Indicators
SCHEMATIC REFERENCEFUNCTION
D2 (Green) FPGA_DONE
Off: FPGA initialization from bitstream in progress
On: FPGA initialization from bitstream complete
D3 (Green) PROJ_ON
Off: System Off
On: System On
D4 (Green) INIT_B
Off: FPGA is in configuration reset state or FPGA has configuration error
On: FPGA begins its initialization sequence
D5 (Green) Input power to controller (from LED driver)
Off: No power connected
On: Power connected
D6 (Green) FPGA_STATUS_1 Blinking when FPGA is configured; we call this FPGA heartbeat.
D7 (Red) HOST_IRQ
Off: Interrupt not asserted
On: Interrupt asserted
D8 (Green) FPGA_STATUS_2 Blinking when FPGA is configured; we call this FPGA heartbeat.

The controller PCB switches are listed in Table 2-3. SW4 is a toggle switch for PROJ_ON, which is used to turn on and off the electronics. Note that parts of the board are still powered when PROJ_ON is in the off position. SW1, SW2 and SW3 are dip switches that control the states of configuration signals the DLPC230-Q1 reads when the DLPC230-Q1 comes out of reset. These switches must be set based on the desired configuration options.

Table 2-3 Controller PCB Switches
SCHEMATIC REFERENCE / SIGNAL NUMBERFUNCTION
SW1 CHKSUM_SEL
Off: Disabled
On: Enabled
SW2 HOST_SPI_MODE
Off: Mode 0 or 3
On: Mode 1 or 2
SW3 HOST_IF_SELECT
Off: Host SPI
On: Host I2C
SW4

SPREAD SPECTRUM ENABLE


Off: Spread spectrum disabled
On: Use flash spread spectrum settings
SW5

HOLD_BOOTZ


Off: Do not hold in boot (continue to main application)
On: Hold in boot
SW6 PROJ_ON
Off: Turn off DLP® subsystem
On: Turn on DLP® subsystem
PB1 PROGRAM_B
Depressed: FPGA configuration clears and new configuration sequence begins
Released: Configuration (programming) sequence begins