SLVUDN2 March   2026

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware Connector, Test Point, and Selection Switch Descriptions
    1. 2.1 Connector Descriptions
    2. 2.2 Jumper Descriptions
    3. 2.3 Test Point Descriptions
  9. 3Implementation Results
    1. 3.1 Test Setup
    2. 3.2 Test Procedure
    3. 3.3 Precautions
    4. 3.4 Test Data and Performance Curves
      1. 3.4.1 Thermal Performance
      2. 3.4.2 Efficiency
      3. 3.4.3 Steady State Waveforms
      4. 3.4.4 Step Load Response
      5. 3.4.5 AC Loop Response Curves
  10. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 Board Layout
    3. 4.3 Bill of Materials
  11. 5Additional Information
    1.     Trademarks

2.2 Jumper Descriptions

Table 2-3 Jumpers
Reference DesignatorPinsDescriptionDefault Connection

JP1

Pin 1 to Pin 2 Set DTRK to GND

*

JP2Pin 1 to Pin 3

Can be used for Bode plot signal injection, when external voltage divider circuit is used

Pin 4 to Pin 5

(FB)

Connect FB to VCC2 (if R2 is not assembled) to use internal voltage divider circuit

JP3Pin 1 to Pin 2

(VOUT1)

Connect

BIAS to VOUT (output of power stage)

*

Pin 2 to Pin 3

(VIN)

Connect

BIAS to VIN (after disconnect switch)

JP4Pin 1 to Pin 2

(GND)

Connect

EN/UVLO to GND

Pin 2 to Pin 3

(VIN)

Connect

EN/UVLO to VIN

JP5Pin 1 to Pin 2

(GND)

Set MODE low: PSM mode

Pin 2 to Pin 3

(VCC2)

Set MODE high: FPWM mode

*

JP6

Pin 1 to Pin 2

(SYNC)

Set SYNC to GND

*

JP7

Pin 1 to Pin 2

(GND)

Connect ILIMCOMP to GND
Pin 2 to Pin 3

(VCC2)

Connect ILIMCOMP to VCC2

(disable current limiter)

Open

Enable Current Limiter function

JP8

Pin 1 to Pin 2

(ADDR/AGND)

Set I2C address to 0x6A

*

Pin 2 to Pin 3

(ADDR/VCC2)

Set I2C address to 0x6B