3 What is this Request Mode?

Request mode helps get glitch-free sysref outputs (SYS0-SYS3). Different modes of outputs are supported on SYS0-SYS3 as shown in Table 3-1.

For this application note waveforms, Multi-site board of LMX1205 is used where 3 devices are present namely as primary, two secondary (secondary1 and secondary2). Following Figure 3-1, shows the top level arrangement of the Multi-site board.

Figure 3-1 Multiple LMX1205 Configuration

Table 3-2 summarizes the configuration used for the waveforms taken on the multi-site board. Secondary1 and secondary2 device has the same configuration. Naming of the Pins are as per the LMX1205 Low-Noise, High-Frequency JESD Buffer/Multiplier/Divider, data sheet.

Flow chart shown in Figure 3-2, highlighting the sequence of steps to be followed when secondary1 device (driven by CH0 output from Primary) is supposed to be deterministic. Same applies for Secondary2 device except that different channel (CH1) from Primary device output drives the input pins.

Figure 3-2 Sequence of Events on LMX1205 Multi-site Board

Assuming that secondary1 and secondary2 device needs to be setup such that it is always deterministic. During step1 from Figure 3-2, load the tics pro details(See Appendix step1) such that Primary device is in sysref request mode. Output of Primary SYSREFOUT0/1_P/N drives the secondary 1 and 2 SYSREFREQ_P/N input pins and input respective setting needs to be written to that particular device. Table 3-3 summarizes the different termination configurations.

Multi-site board has 3 devices as discussed. On-board mux is present which write to only one device at a time based on the select lines. SEL0 and SEL1 are the two select lines which can be configured through tics-pro GUI under user controls --> Pins tab. Before writing to any device, make sure that device is selected through Table 3-4.

After loading the tics pro file on primary device, continuous sysref signal can be coming on primary device output. If pulse mode needs to be engaged at primary output, give Low to High pulse at the Primary input Pin 2 using SPI registers SYSREFREQ_INPUT (R17<7:6>) by toggling from 1(decimal) to 3(decimal) and SYSREF_MODE as 1 . This can generate pulses at sysref output of primary in pulse mode. Secondary1 and Secondary2 needs to be kept in windowing mode using tics-pro(See Appendix step2) and generate pulse at the primary output. Before doing windowing, give 1 to 0 toggle for the register SYSREFREQ_CLR (R17<2>). Read the windowing code(rb_CLKPOS R30<15:0>) from the secondary1 and secondary2 devices. If there is a continuous signal at the primary output, on every low to high transition, windowing keeps happening in secondary1 and secondary2. Readback of the windowing keeps changing, so to avoid that SYSWND_UPDATE_STOP(R17<5>) needs to be made 1. Write the SYSREFREQ_DLY position register in secondary1 and secondary2 device. This can make sure that rise edge at the pin of secondary1 and secondary2 can always align at the fall edge of the clock input through some internal delays.

Under calculations tab, there is a way to check what value to be written to SYSREFREQ_DLY register. When “Read CLKPOS” check button is pressed, it automatically reads rb_CLKPOS and calculates SYSREFREQ_DLY value. As shown below for this case, SYSREFREQ_DLY to be written is 12. This is an example for 10GHz input clock. Similar windowing snapshot for 1GHz as clock input is shown Figure 3-3.

Figure 3-3 Sysref Windowing Tics-pro Snapshot Details for 10GHz

Figure 3-4 Sysref Windowing Tics-pro Snapshot Details for 1GHz

Make the secondary1 and secondary2 device in sync mode as shown in Table 2-1 . Generate pulse at the primary output to secondary 1 and secondary 2 input (pin 3 and pin 4), this can make sure that both secondary1 and secondary2 are synced and can be deterministic.

Registers to be written on secondary1 and secondary2 to make devices sync after windowing:

1. SYSREFREQ_DLY
2. SYSREFREQ_CLR -->1-->0 toggle
3. SYSREFREQ_MODE -->0
4. SYNC_STOP-->1

After previous register writes, both secondary1 and secondary2 are synced. Make the secondary1 and secondary2 device in sysref request mode as shown in Table 3-1. Figure 3-5 shows the configuration where Primary is in continuous mode, secondary 1 and secondary2 are in continuous mode.

SYSREFREQ_MODE -->1 to enter request mode. As shown in Figure 3-5, both seconadry1 and secondary2 devices are deterministic.

Figure 3-5 Synced Waveforms for Primary, Secondary1, and Secondary2 in Continuous Mode

Yellow: Continuous Primary sysrefout2_p

Red: Continuous Secondary1 sysrefout2_p

Green: Continuous Secondary2 sysrefout2_p

Frequencies used for the previous example:

CLKIN as 1GHz, Primary sysrefout2_p as 3.125MHz, Secondary1/2 sysrefout2_p as 31.25MHz

If the frequency of CLKIN is changed, make sure IQ divider value SYSREF_DLY_DIV(R20<15:14>) and frequency range settings (SYSREF_DLY_SCALE R16<7:6>) accordingly as shown in data sheet.

As shown previously, as primary is in continuous mode, when pin 3 is low, no sysref comes out. This can be avoided by pulling the pin3 internally high on secondary1 and secondary 2 using SPI as shown in Table 3-5.

Figure 3-6 Synced Waveforms for Primary, Secondary1, and Secondary2 With Continuous Secondary1 and Secondary2 in Continuous Mode

As shown in Figure 3-6, Primary continuous pulse is bypassed in both secondary 1 and secondary2 device inputs.

As discussed in Table 3-1 about different modes of sysref outputs, see the following section how the output waveforms looks like.