SNAA447 May 2025 LMK00334 , LMK00338
Table 5-1 is the PCIe compliance results summary for the LMK0033x phase noise analysis, which demonstrates the jitter compliance of the device for PCIe Gen 1 through 7, noise folds 0 and 3, and clock architectures Common Clock (CC) and Separate Reference No Spread (SRNS).
A PCIe jitter spec or time domain calculation can have one of the following statuses:
| Jitter Filter | Clock Arch. | Noise Fold | Min (fs) | Max (fs) | Limit (fs) | Status |
|---|---|---|---|---|---|---|
| PCIe1 | CC | 0 | 0.0 | 96.3 | 86,000 | PASS |
| 3 | 0.0 | 112 | 86,000 | PASS | ||
| SRNS | 0 | N/A | N/A | N/A | N/A | |
| 3 | N/A | N/A | N/A | N/A | ||
| PCIe2 | CC | 0 | 28.3 | 86.1 | 3,100 | PASS |
| 3 | 33.1 | 102 | 3,100 | PASS | ||
| SRNS | 0 | 37.9 | 96.4 | N/A | N/A | |
| 3 | 43.5 | 111 | N/A | N/A | ||
| PCIe3 | CC | 0 | 9.19 | 25.7 | 1,000 | PASS |
| 3 | 10.9 | 30.5 | 1,000 | PASS | ||
| SRNS | 0 | 10.9 | 29.4 | N/A | N/A | |
| 3 | 12.7 | 34.5 | N/A | N/A | ||
| PCIe4 | CC | 0 | 9.19 | 25.7 | 500.0 | PASS |
| 3 | 10.9 | 30.5 | 500.0 | PASS | ||
| SRNS | 0 | 10.9 | 29.4 | N/A | N/A | |
| 3 | 12.7 | 34.5 | N/A | N/A | ||
| PCIe5 | CC | 0 | 2.07 | 10.6 | 150.0 | PASS |
| 3 | 2.49 | 12.8 | 150.0 | PASS | ||
| SRNS | 0 | 2.38 | 11.9 | N/A | N/A | |
| 3 | 2.79 | 14.0 | N/A | N/A | ||
| PCIe6 | CC | 0 | 0 | 6.53 | 100.0 | PASS |
| 3 | 2.73 | 7.78 | 100.0 | PASS | ||
| SR | 0 | 3.21 | 9.06 | N/A | N/A | |
| 3 | 3.71 | 10.5 | N/A | N/A | ||
| PCIe7 | CC | 0 | 1.60 | 4.58 | 67.0 | PASS |
| 3 | 1.91 | 5.46 | 67.0 | PASS | ||
| SR | 0 | 2.24 | 6.37 | N/A | N/A | |
| 3 | 2.60 | 7.37 | N/A | N/A |
Table 5-2 is the PCIe compliance summary for the LMK0033x time domain analysis which demonstrates the time domain compliance of the device.
| Calculation | Min | Avg | Max | Limit | Status |
|---|---|---|---|---|---|
| Vcross | 330.09mV | 343.67mV | 357.31mV | 250mV to 550mV | PASS |
| Vhigh | 758.527mV | 758.527mV | 150mVmV | PASS | |
| Vlow | –42.394mV | –42.394mV | –150mVmV | PASS | |
| Period | 9.971ns | 10.0ns | 10.022ns | 9.847ns to 10.203ns | PASS |
| Duty Cycle | 49.441% | 49.624% | 49.825% | 40% to 60% | PASS |
| Overshoot Voltage | 72.83mV | 91.34mV | 300mV | PASS | |
| Undershoot Voltage | –57.47mV | –70.69mV | –300mV | PASS | |
| Rising Edge Rate | 2.14V/ns | 2.419V/ns | 2.718V/ns | 0.6V/ns to 4.0V/ns | PASS |
| Falling Edge Rate | 2.24V/ns | 2.508V/ns | 2.818V/ns | 0.6V/ns to 4.0V/ns | PASS |