The LMK00334 device is a 4-output HCSL fanout buffer intended for high-frequency, low-jitter clock, data distribution, and level translation. The device is capable of distributing the reference clock for ADCs, DACs, multi-gigabit Ethernet, XAUI, fibre channel, SATA/SAS, SONET/SDH, CPRI, and high-frequency backplanes.
The input clock can be selected from two universal inputs or one crystal input. The selected input clock is distributed to two banks of two HCSL outputs and one LVCMOS output. The LVCMOS output has a synchronous enable input for runt-pulse-free operation when enabled or disabled. The LMK00334 operates from a 3.3V core supply and three independent 3.3V or 2.5V output supplies.
The LMK00334 provides high performance, versatility, and power efficiency, making the device designed for replacing fixed-output buffer devices while increasing timing margin in the system.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | LMK00334 Four-Output Clock Buffer and Level Translator for PCIe® Gen 1 to Gen 7 datasheet (Rev. F) | PDF | HTML | Aug 5, 2025 |
| Application note | LMK0033x PCI Express Compliance Report | PDF | HTML | May 5, 2025 | |
| Application note | Clocking for PCIe Applications | PDF | HTML | Nov 28, 2023 |
For additional terms or required resources, click any title below to view the detail page where available.
The LMK00338 is a 400MHz, 8-output HCSL buffer intended for PCIe Gen1/2/3 Applications, low additive jitter clock distribution and level translation. The EVM allows the user to verify the functionality and performance specification of the device. Refer to the LMK00338 datasheet for the functional (...)
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| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| WQFN (RTV) | 32 | Ultra Librarian |
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