SNAS935C
March 2025 – July 2026
CDC6C-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Device Comparison
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Environmental Compliance
6.4
Recommended Operating Conditions
6.5
Thermal Information
6.6
Electrical Characteristics
6.7
Timing Diagrams
6.8
Typical Characteristics
7
Parameter Measurement Information
7.1
Device Output Configurations
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Bulk Acoustic Wave (BAW)
8.3.2
Device Block-Level Description
8.3.3
Function Pin
8.3.4
Clock Output Interfacing and Termination
8.3.5
CDC6Cx-Q1 CISPR25 Radiated Emission Performance
8.3.5.1
EMI Reduction and Slow Mode Options
8.3.6
Temperature Stability
8.3.7
Frequency Aging
8.3.8
Mechanical Robustness
8.3.9
Wettable Flanks
8.3.10
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.1.1
Driving Multiple Loads With a Single CDC6Cx-Q1
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.1.1
Providing Thermal Reliability
9.4.1.2
Recommended Solder Reflow Profile
9.4.2
Layout Examples
10
Device and Documentation Support
10.1
Documentation Support
10.1.1
Related Documentation
10.2
Receiving Notification of Documentation Updates
10.3
Support Resources
10.4
Trademarks
10.5
Electrostatic Discharge Caution
10.6
Glossary
11
Revision History
12
Mechanical, Packaging, and Orderable Information
1
Features
AEC Q-100 qualified:
Device temperature grade 1: –40°C to +125°C
Functional Safety-Capable
:
Documentation available to aid functional safety system design
LVCMOS output oscillator supporting frequency range from 250kHz to 200MHz
Supply voltage supports 1.8V to 3.3V ±10%.
Very low power consumption: 4.57mA typical and 7.9mA maximum for 25MHz at 1.8V
Stand by current 1.5µA typical at 1.8V helps for battery powered applications
Low jitter: < 750fs RMS jitter for F
out
≥ 10MHz
Smallest industry wettable flank standard package: 1.60mm × 1.20mm (DLY), 2.00mm × 1.60mm (DLR), 2.5mm × 2.00mm (DLF), 3.20mm × 2.5mm (DLN)
Universal land pattern footprint under
Mechanical, Packaging, and Orderable Information
Integrated LDO for robust supply noise immunity
Start-up time < 3ms
Contact TI for different start-up times.
Orderable options for slow rise and fall time for EMI reduction
Supported frequencies (MHz):
1.2, 2.048, 4, 5.12, 6.78, 8, 8.192, 10, 12, 12.288, 16, 19.2, 20, 24, 24.576, 25, 26, 27, 30, 33.33, 33.333, 38.4, 40, 48, 50, 66.666, 76.8, 100, 125, 156.25, and more
Contact TI representative for any frequency and samples needed.