SNAU287 November   2023 LMK3H0102 , LMK3H0102-Q1

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
  6. 2Hardware
    1. 2.1 Evaluation Setup Requirement
    2. 2.2 Configuring the EVM
      1. 2.2.1 Configuring the Power Supply
      2. 2.2.2 Configuring the Control Pins
      3. 2.2.3 Configuring the Clock Outputs
      4. 2.2.4 Using the USB Interface Connection
      5. 2.2.5 EVM Quick Start Guide
    3. 2.3 Modes of Operation
  7. 3Software
    1. 3.1 Using TICS Pro with the LMK3H0102EVM
      1. 3.1.1 Using the LMK3H0102 Wizard
        1. 3.1.1.1 Frequency Plan
        2. 3.1.1.2 Output Formats
        3. 3.1.1.3 Output Enable Pin
        4. 3.1.1.4 OTP Options
        5. 3.1.1.5 Review
        6. 3.1.1.6 Design Report
      2. 3.1.2 Live Debugger
        1. 3.1.2.1 FODs
        2. 3.1.2.2 Outputs
        3. 3.1.2.3 Others
      3. 3.1.3 Programming
        1. 3.1.3.1 Registers
        2. 3.1.3.2 OTP Configuration
      4. 3.1.4 Help
        1. 3.1.4.1 Contact TI
    2. 3.2 Using TI’s USB2ANY Module for In-System Programming of the LMK3H0102
      1. 3.2.1 USB2ANY Board Connections
      2. 3.2.2 Ordering a USB2ANY Module
  8. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layout
    3. 4.3 Bill of Materials
  9. 5Additional Information
    1.     Trademarks
  10. 6Related Documentation

3.1.1.3 Output Enable Pin

GUID-20230428-SS0I-4NKZ-BV1K-9RNB9SPHFDXT-low.pngFigure 3-4 LMK3H0102 Wizard Output Enable Pin Page

The Output Enable Pin page allows for configuration of the OE pin behavior. By default, the pin is configured as an active-low pin. The pin can be configured to active-high, where connecting the OE pin to GND disables the outputs.

The disabled state behavior can be set such that, on disable, the device enters a power-down mode with only I2C accessible. This is not recommended for applications where the clocks need to re-enable quickly, such as PCIe applications, as the device must power up again prior to the output clocks being ready.