SNIS245B September   2025  – July 2026 ISOTMP35R-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Insulation Specification
    6. 6.6  Power Ratings
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Functional Description
      1. 7.3.1 Integrated Isolation Barrier
      2. 7.3.2 Output Stage and Signal Behavior
        1. 7.3.2.1 Transfer Function
        2. 7.3.2.2 Driving Capacitive Loads
        3. 7.3.2.3 Common Mode Transient Immunity (CMTI)
      3. 7.3.3 Thermal Response
        1. 7.3.3.1 Stirred Liquid Thermal Response
        2. 7.3.3.2 Directional Thermal Response
          1. 7.3.3.2.1 Comparison to NTC Thermistors
        3. 7.3.3.3 Still Air Thermal Response
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Improving Accuracy Using Piecewise Linear Approximation
      2. 8.1.2 Output Buffering and Signal Integrity Considerations
      3. 8.1.3 ADC Interface Considerations
      4. 8.1.4 Power Supply Recommendations
      5. 8.1.5 EMI Mitigation and Filtering
        1. 8.1.5.1 Filtering Techniques
        2. 8.1.5.2 Design Guidelines for EMI Filtering
      6. 8.1.6 Insulation Lifetime
    2. 8.2 Layout
      1. 8.2.1 Layout Guidelines
      2. 8.2.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Mechanical Data
    2. 11.2 Package Option Addendum
    3. 11.3 Tape and Reel Information

5 Pin Configuration and Functions

Figure 5-1 DFP Package 12-Pin SSOP Top View
Table 5-1 Pin Functions
PINTYPE(1)DESCRIPTION
NAMEDFP
GND

5

GGround reference.
NC2

—

No internal connection. These pins can be left floating or connected to GND. Connecting the pins to GND can improve EMI robustness in noisy environments.

4

6

TSENSE

7

T

Isolated temperature sensing node. Place TSENSE pins in close thermal proximity to the heat source to minimize thermal gradients and improve measurement accuracy. See Section 8.2.1 and Section 8.2.2 for layout recommendations and examples.

8

9

10

11

12

VDD1P

Supply voltage input. Use a low-noise supply and place a 0.1µF decoupling capacitor close to the VDD and GND pins. See Section 8.1.4 for additional power-supply recommendations.

VOUT

3

O

Analog output voltage proportional to temperature. The output is optimized to interface directly with ADC inputs. See Section 7.3.2.2 for capacitive load driving considerations and Section 8.1.3 for ADC interface guidance.

(1) I = Input, O = Output, I/O = Input or Output, T = Thermal Sensing Node, G = Ground, P = Power